Abstract: A semiconductor device includes a semiconductor substrate having a trench in its surface, an insulating film in the trench, a doped conductive layer on the insulating film, a gate insulation film and a gate electrode on the doped conductive layer over the trench, and source and drain impurity regions in the surface of the semiconductor substrate at sides of the gate electrode.

Abstract: A semiconductor device includes a semiconductor substrate having a trench in its surface, an insulating film in the trench, a doped conductive layer on the insulating film, a gate insulation film and a gate electrode on the doped conductive layer over the trench, and source and drain impurity regions in the surface of the semiconductor substrate at sides of the gate electrode.

Abstract: A method for fabricating a capacitor of a semiconductor device, includes providing a semiconductor substrate, forming a polysilicon layer pattern on the semiconductor substrate, forming a first HSG structure on an inner surface of the polysilicon layer pattern, forming a second HSG structure on the first HSG structure and an outer surface of the polysilicon layer pattern to produce a lower electrode of the capacitor, forming a dielectric film on the second HSG structure, and forming an upper electrode on the dielectric film.

Abstract: A semiconductor device includes a semiconductor substrate having a trench in its surface, an insulating film in the trench, a doped conductive layer on the insulating film, a gate insulation film and a gate electrode on the doped conductive layer over the trench, and source and drain impurity regions in the surface of the semiconductor substrate at sides of the gate electrode.

Abstract: A method for fabricating a capacitor of a semiconductor device, includes providing a semiconductor substrate, forming a polysilicon layer pattern on the semiconductor substrate, forming a first HSG structure on an inner surface of the polysilicon layer pattern, forming a second HSG structure on the first HSG structure and an outer surface of the polysilicon layer pattern to produce a lower electrode of the capacitor, forming a dielectric film on the second HSG structure, and forming an upper electrode on the dielectric film.

Abstract: A MOSFET is fabricated by forming a trench in a semiconductor substrate, forming an insulating film in the trench, forming a gate electrode to fill in the trench, forming a gate oxide on the gate electrode, the insulating film and an adjacent portion of the semiconductor substrate, forming a first silicon film on the semiconductor substrate and on a portion of the gate oxide, and forming a second silicon film on a portion of the gate oxide on which the first silicon film is not formed. Since the thusly fabricated MOSFET has a controlled channel length, modeling of the device can be easily achieved and its mass-producibility is improved.

Abstract: A MOSFET is fabricated by forming a trench in a semiconductor substrate, forming an insulating film in the trench, forming a gate electrode to fill in the trench, forming a gate oxide on the gate electrode, the insulating film and an adjacent portion of the semiconductor substrate, forming a first silicon film on the semiconductor substrate and on a portion of the gate oxide, and forming a second silicon film on a portion of the gate oxide on which the first silicon film is not formed. Since the thusly fabricated MOSFET has a controlled channel length, modeling of the device can be easily achieved and its mass-producibility is improved.

Abstract: A MOSFET is fabricated by forming a trench in a semiconductor substrate, forming an insulating film in the trench, forming a gate electrode to fill in the trench, forming a gate oxide on the gate electrode, the insulating film and an adjacent portion of the semiconductor substrate, forming a first silicon film on the semiconductor substrate and on a portion of the gate oxide, and forming a second silicon film on a portion of the gate oxide on which the first silicon film is not formed. Since the thusly fabricated MOSFET has a controlled channel length, modeling of the device can be easily achieved and its mass-producibility is improved.