Patents by Inventor Yeong Bae Ahn

Yeong Bae Ahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8242583
    Abstract: A semiconductor device including a CMP dummy pattern and a method for manufacturing the same are provided. The warpage of a wafer can be prevented by forming the CMP dummy pattern in the same direction and/or at the same angle as a pattern of a cell region. Accordingly, overlay error caused by etching residues is reduced, thereby improving the yield of the semiconductor device.
    Type: Grant
    Filed: June 26, 2009
    Date of Patent: August 14, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventors: Hyoung Soon Yune, Yeong Bae Ahn
  • Publication number: 20100155904
    Abstract: A semiconductor device including a CMP dummy pattern and a method for manufacturing the same are provided. The warpage of a wafer can be prevented by forming the CMP dummy pattern in the same direction and/or at the same angle as a pattern of a cell region. Accordingly, overlay error caused by etching residues is reduced, thereby improving the yield of the semiconductor device.
    Type: Application
    Filed: June 26, 2009
    Publication date: June 24, 2010
    Applicant: Hynix Semiconductor Inc.
    Inventors: Hyoung Soon YUNE, Yeong Bae Ahn
  • Publication number: 20070292776
    Abstract: A substrate includes an overlay vernier key structure that includes an outer pattern formed over one layer over a semiconductor substrate, as a reference for an overlay measurement, and an inner pattern comprising a cluster of vernier patterns formed over another layer.
    Type: Application
    Filed: June 6, 2007
    Publication date: December 20, 2007
    Applicant: Hynix Semiconductor Inc.
    Inventors: Byeong Ho Cho, Yeong Bae Ahn