Patents by Inventor Yeong-Ching Chao

Yeong-Ching Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060087018
    Abstract: A multi-chip image sensor module includes a flexible module board, an image sensor chip, a transparent cover, and at least an IC chip. The flexible module board has a first die-attached portion, a second die-attached portion, at least one bent portion, and at least one bonding portion where the bent portion connects the first die-attached portion and the bonding portion. The image sensor chip is attached to the first die-attached portion and the IC chip is disposed on the second die-attached portion. Inner leads on the bonding portion are electrically connected to the bonding pads of the image sensor chip when the bonding portion is bonded on the image sensor chip. The transparent cover is disposed above the sensing area of the image sensor chip, preferably adhered to the bonding portion.
    Type: Application
    Filed: October 21, 2005
    Publication date: April 27, 2006
    Inventors: Yeong-Ching Chao, An-Hong Liu, Yao-Jung Lee
  • Publication number: 20060086890
    Abstract: An image sensor package mainly includes a substrate cover having a chip cavity, an image sensor chip, a flexible circuit, and a transparent carrier. The flexible circuit is attached to the transparent carrier. The image sensor chip is flip-chip mounted on the flexible circuit, and then the substrate cover is mounted on the flexible circuit. The flexible circuit has a plurality of first leads electrically connected to bumps of the image sensor chip, and a plurality of second leads to inner terminals of the substrate cover, so that the electrical connection is established between the image sensor chip and the substrate cover through the flexible circuit. A plurality of outer terminals are formed on the opposing surface of the substrate cover corresponding to the inner terminals. Accordingly, the image sensor package provides the excellent electrical transmission and the protection of the image sensor chip.
    Type: Application
    Filed: October 21, 2005
    Publication date: April 27, 2006
    Inventors: Yeong-Ching Chao, An-Hong Liu, Yao-Jung Lee
  • Publication number: 20060086899
    Abstract: An image sensor package comprises a carrier, an image sensor chip, and a transparent substrate where the carrier has a chip cavity and a plurality of first pads formed around the chip cavity. A plurality of bonding pads are formed on the active surface of the image sensor chip. The image sensor chip is disposed in the chip cavity. A plurality of probe leads are formed on the transparent substrate. The probe leads have a plurality of free tips. When the transparent substrate is adhered to the carrier, the image sensor chip is hermetically sealed, and the free tips are electrically contacted to the bonding pads of the image sensor chip, and the probe leads are electrically connected to the first pads of the carrier. The height variations of the image sensor chip in the chip cavity can be offset by the probe leads.
    Type: Application
    Filed: October 21, 2005
    Publication date: April 27, 2006
    Inventors: Yeong-Ching Chao, An-Hong Liu, Yao-Jung Lee
  • Publication number: 20060042834
    Abstract: An electronic device comprises a substrate and at least a warped spring connector. The substrate has a signal bonding pad and a ground plane. The warped spring connector is disposed on the substrate and is connected to the bonding pad. The warped spring connector includes at least a ground lead electrically connected to the ground plane, a dielectric layer on the ground lead, and a transmitting lead on the dielectric layer. The transmitting lead is bonded to the bonding pad. The ground lead is isolated from and close to the transmitting lead to solve cross-talk and noise problem. Furthermore, the coefficient of thermal expansion of the transmitting lead is different from that of the dielectric layer or the ground lead such that the warped spring connector has a suspending end suspending away from the substrate.
    Type: Application
    Filed: July 26, 2005
    Publication date: March 2, 2006
    Inventors: Yi-Chang Lee, An-Hong Liu, Yeong-Her Wang, Yeong-Ching Chao, Yao-Jung Lee
  • Publication number: 20060043538
    Abstract: An opto-electronic chip includes a plurality of multi-level bumps thereon, each consisting of multiple plated layers. The opto-electronic chip has a plurality of bonding pads and an photoelectric effecting region on its active surface. Each multi-level bump comprises at least an electroless-plated nickel (Ni) layer and an electroless-plated gold (Au) layer wherein the nickel layers cover the bonding pads and the gold layers are formed on the tops of the nickel layers. Furthermore, the thickness of the nickel layers is larger than that of the gold layers. The UBM processes in conventional bumping processes are not needed so that the contaminations or damages to the photoelectric effecting region of the opto-electronic chip due to UBM can be eliminated.
    Type: Application
    Filed: August 23, 2005
    Publication date: March 2, 2006
    Inventors: Yi-Chang Lee, An-Hong Liu, Yeong-Ching Chao, Yao-Jung Lee
  • Patent number: 6946860
    Abstract: A modularized probe head for modularly assembling on a probe card is configured for probing a semiconductor wafer under test. The probe head includes a silicon substrate having an active surface and an opposing back surface. The back surface of the silicon substrate is attached on a holder. The silicon substrate has a plurality of peripheral bond pads and contact pads on its active surface. At least a probing chip is mounted on the active surface of the silicon substrate. The probing chip has probing tips and side electrodes. The side electrodes are connected with the contact pads by means of solder material. The peripheral bonding pads of the silicon substrate are connected with a flexible printed circuit for electrically connecting to a multi-layer printed circuit board of a probe card.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: September 20, 2005
    Assignees: ChipMOS Technologies (Bermuda) Ltd., ChipMOS Technologies Inc.
    Inventors: Shih-Jye Cheng, An-Hong Liu, Yeong-Her Wang, Yeong-Ching Chao, Yao-Jung Lee
  • Publication number: 20050088190
    Abstract: A modularized probe head for modularly assembling on a probe card is configured for probing a semiconductor wafer under test. The probe head includes a silicon substrate having an active surface and an opposing back surface. The back surface of the silicon substrate is attached on a holder. The silicon substrate has a plurality of peripheral bond pads and contact pads on its active surface. At least a probing chip is mounted on the active surface of the silicon substrate. The probing chip has probing tips and side electrodes. The side electrodes are connected with the contact pads by means of solder material. The peripheral bonding pads of the silicon substrate are connected with a flexible printed circuit for electrically connecting to a multi-layer printed circuit board of a probe card.
    Type: Application
    Filed: October 8, 2003
    Publication date: April 28, 2005
    Inventors: S.J. Cheng, An-Hong Liu, Yeong-Her Wang, Yeong-Ching Chao, Y.J. Lee