Patents by Inventor Yeong-Jae Woo

Yeong-Jae Woo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11416168
    Abstract: A memory controller and a storage device including the same are provided. The memory controller for performing a buffering operation of temporarily storing data to be written to a non-volatile memory and data to be read from the non-volatile memory in a buffer memory includes a buffer request queue configured to store a plurality of buffer write requests requesting data to be temporarily stored in the buffer memory and a plurality of buffer read requests requesting data stored in the buffer memory to be read, a buffer traffic monitor configured to calculate the total amount of requested data in real time by summing the lengths of data specified in the respective buffer write requests and the respective buffer read requests stored in the buffer request queue, and a buffer manager configured to control execution of the buffering operation by setting an execution ratio based on the total amount of requested data calculated in real time.
    Type: Grant
    Filed: November 6, 2020
    Date of Patent: August 16, 2022
    Assignee: FADU Inc.
    Inventors: Hongseok Kim, EHyun Nam, Yeong-Jae Woo, Jin-yong Choi
  • Publication number: 20220197549
    Abstract: A memory controller and a storage device including the same are provided. The memory controller is provided with an internal memory in addition to an external memory for write buffering, and may manage a buffer in different modes according to the write workload of a host.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 23, 2022
    Applicant: FADU Inc.
    Inventors: Yeong-Jae WOO, Hongseok KIM, EHyun NAM
  • Publication number: 20220197548
    Abstract: A memory controller and a storage device including the same are provided. The memory controller is provided with an internal memory in addition to an external memory for write buffering. Accordingly, the frequency of accessing the external memory may be reduced.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 23, 2022
    Applicant: FADU Inc.
    Inventors: Yeong-Jae WOO, Hongseok KIM, EHyun NAM
  • Patent number: 11321243
    Abstract: A data storage device includes a memory device including a normal data region and a mapping data region, the normal data region being configured to store normal data, the mapping data region being configured to store mapping data; a host request managing device configured to manage a read/write request from a host; a mapping managing device configured to cache a part of the mapping data and to manage mapping information according to a request from the host request managing device; and a memory controller configured to manage an operation of the memory device according to a request from at least one of the host request managing device and the mapping managing device.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: May 3, 2022
    Assignees: SK hynix Inc., Seoul National University R&DB Foundation
    Inventors: Yeong Jae Woo, Sang Lyul Min
  • Publication number: 20210141559
    Abstract: A memory controller and a storage device including the same are provided. The memory controller for performing a buffering operation of temporarily storing data to be written to a non-volatile memory and data to be read from the non-volatile memory in a buffer memory includes a buffer request queue configured to store a plurality of buffer write requests requesting data to be temporarily stored in the buffer memory and a plurality of buffer read requests requesting data stored in the buffer memory to be read, a buffer traffic monitor configured to calculate the total amount of requested data in real time by summing the lengths of data specified in the respective buffer write requests and the respective buffer read requests stored in the buffer request queue, and a buffer manager configured to control execution of the buffering operation by setting an execution ratio based on the total amount of requested data calculated in real time.
    Type: Application
    Filed: November 6, 2020
    Publication date: May 13, 2021
    Applicant: FADU Inc.
    Inventors: Hongseok KIM, EHyun NAM, Yeong-Jae WOO, Jin-yong CHOI
  • Publication number: 20200341910
    Abstract: A data storage device includes a memory device including a normal data region and a mapping data region, the normal data region being configured to store normal data, the mapping data region being configured to store mapping data; a host request managing device configured to manage a read/write request from a host; a mapping managing device configured to cache a part of the mapping data and to manage mapping information according to a request from the host request managing device; and a memory controller configured to manage an operation of the memory device according to a request from at least one of the host request managing device and the mapping managing device.
    Type: Application
    Filed: July 9, 2020
    Publication date: October 29, 2020
    Inventors: Yeong Jae WOO, Sang Lyul MIN
  • Patent number: 10789160
    Abstract: A method of operating a storage device which includes a non-volatile memory including a normal unit configured to store normal data and a swap unit configured to store swap data and a controller configured to control the non-volatile memory is provided. The method includes receiving the swap data and a unit selection signal for selecting the swap unit from a host; and processing the swap data according to a data processing policy of the swap unit and writing the processed swap data to the swap unit. The data processing policy of the swap unit may be different from a data processing policy of the normal unit.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: September 29, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung Yong Seo, Kyung Ho Kim, Seung Uk Shin, Yeong Jae Woo, Hyun Ju Kim, Jeong Hoon Cho
  • Patent number: 10747684
    Abstract: A semiconductor device includes a mapping cache configured to cache mapping data stored in a memory device, and a cache controller configured to manage the mapping cache, wherein the mapping cache comprises a first cache including a plurality of cache blocks, each cache block storing first mapping information and a link for another cache block storing second mapping information having a relationship with the first mapping information.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: August 18, 2020
    Assignees: SK hynix Inc., Seoul National University R&DB Foundation
    Inventors: Yeong Jae Woo, Sang Lyul Min
  • Publication number: 20190188150
    Abstract: A semiconductor device includes a mapping cache configured to cache mapping data stored in a memory device, and a cache controller configured to manage the mapping cache, wherein the mapping cache comprises a first cache including a plurality of cache blocks, each cache block storing first mapping information and a link for another cache block storing second mapping information having a relationship with the first mapping information.
    Type: Application
    Filed: September 12, 2018
    Publication date: June 20, 2019
    Inventors: Yeong Jae WOO, Sang Lyul MIN
  • Patent number: 10089031
    Abstract: Data storage is provided which includes a nonvolatile memory device including a plurality of memory blocks divided into a first region being an over provisioning region and a second region, and a storage controller allocating at least one memory block, corresponding to an unconcerned sector, from among memory blocks of the second region to the first region. It may be possible to adjust the number of reserved memory blocks in the over provisioning region.
    Type: Grant
    Filed: February 9, 2016
    Date of Patent: October 2, 2018
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungyong Seo, Yeong-Jae Woo, MoonSang Kwon, Sunmi Lee
  • Patent number: 9952766
    Abstract: A memory device capable of performing an overwrite operation, a memory system, and a method of operating the memory system are provided. The method includes receiving one or more write requests, a logical address and data corresponding to the one or more write requests; comparing a result of analyzing at least one of the received one or more write requests, logical address, and data with a threshold value; and writing data using a first update method or a second update method, based on a result of the comparison. When the first update method is selected, the data are written in a region indicated by a physical address corresponding to the logical address according to address mapping information. When the second update method is selected, information of the physical address corresponding to the logical address is changed, and the data are written in a region indicated by the changed physical address.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: April 24, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yeong-Jae Woo, Kyoung-Il Bang, Sung-Yong Seo, Eun-Chu Oh, Moon-Sang Kwon, Han-Shin Shin
  • Patent number: 9891838
    Abstract: A method of operating a memory system including a nonvolatile memory, having a meta data region and a user data region, and a memory controller having a meta data manager. The method includes programming data to a memory block of the user data region and, by operation of the meta data manager, generating a meta log based on the programming. The meta log is stored to the memory controller. Upon a power-off operation, selectively storing the meta log to the meta data region of the nonvolatile memory based on status information of the nonvolatile memory.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: February 13, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yeong-Jae Woo, Sungyong Seo, Otae Bae, Hyun-Seung Jei
  • Patent number: 9697116
    Abstract: A writing method of a storage system which includes a host and a storage connected to the host, includes receiving journal data during a generation of a data writing transaction; inserting in a first map table, a plurality of entries, each entry including a first logical address of a first logical area of the storage and a second logical address of a second logical area of the storage; writing the journal data to a physical area of the storage corresponding to the first logical address; and remapping the physical area from the first logical address onto the second logical address using the plurality of entries when a size of a usable space of the first logical area is less than a desired value.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: July 4, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sangmok Kim, Kyung Ho Kim, Yeong-jae Woo, Seunguk Shin, Sungyong Seo
  • Publication number: 20160299722
    Abstract: Data storage is provided which includes a nonvolatile memory device including a plurality of memory blocks divided into a first region being an over provisioning region and a second region, and a storage controller allocating at least one memory block, corresponding to an unconcerned sector, from among memory blocks of the second region to the first region. It may be possible to adjust the number of reserved memory blocks in the over provisioning region.
    Type: Application
    Filed: February 9, 2016
    Publication date: October 13, 2016
    Inventors: SUNGYONG SEO, YEONG-JAE WOO, MoonSang KWON, SUNMI LEE
  • Publication number: 20160266795
    Abstract: A method of operating a memory system including a nonvolatile memory, having a meta data region and a user data region, and a memory controller having a meta data manager. The method includes programming data to a memory block of the user data region and, by operation of the meta data manager, generating a meta log based on the programming. The meta log is stored to the memory controller. Upon a power-off operation, selectively storing the meta log to the meta data region of the nonvolatile memory based on status information of the nonvolatile memory.
    Type: Application
    Filed: January 14, 2016
    Publication date: September 15, 2016
    Inventors: YEONG-JAE WOO, SUNGYONG SEO, OTAE BAE, HYUN-SEUNG JEI
  • Publication number: 20160224247
    Abstract: A memory device capable of performing an overwrite operation, a memory system, and a method of operating the memory system are provided. The method includes receiving one or more write requests, a logical address and data corresponding to the one or more write requests; comparing a result of analyzing at least one of the received one or more write requests, logical address, and data with a threshold value; and writing data using a first update method or a second update method, based on a result of the comparison. When the first update method is selected, the data are written in a region indicated by a physical address corresponding to the logical address according to address mapping information. When the second update method is selected, information of the physical address corresponding to the logical address is changed, and the data are written in a region indicated by the changed physical address.
    Type: Application
    Filed: January 13, 2016
    Publication date: August 4, 2016
    Inventors: YEONG-JAE WOO, KYOUNG-IL BANG, SUNG-YONG SEO, EUN-CHU OH, MOON-SANG KWON, HAN-SHIN SHIN
  • Patent number: 9348521
    Abstract: A semiconductor storage device and a method of throttling performance of the same are provided. The semiconductor storage device includes a non-volatile memory device; and a controller configured to receive a write command from a host and program write data received from the host to the non-volatile memory device in response to the write command. The controller inserts idle time after receiving the write data from the host and/or after programming the write data to the non-volatile memory device.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: May 24, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han-Bin Yoon, Yeong-jae Woo, Dong-gi Lee, Kwang-Ho Kim, Hyuck-Sun Kwon
  • Patent number: 9223506
    Abstract: A semiconductor storage device and a method of throttling performance of the same are provided. The semiconductor storage device includes a non-volatile memory device configured to store data in a non-volatile state; and a controller configured to control the non-volatile memory device. The controller calculates a new performance level, compares the calculated performance level with a predetermined reference, and determines the calculated performance level as an updated performance level according to the comparison result.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: December 29, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Han Bin Yoon, Yeong-Jae Woo, Dong Gi Lee, Young Kug Moon, Hyuvk-Sun Kwon
  • Publication number: 20150046636
    Abstract: A method of operating a storage device which includes a non-volatile memory including a normal unit configured to store normal data and a swap unit configured to store swap data and a controller configured to control the non-volatile memory is provided. The method includes receiving the swap data and a unit selection signal for selecting the swap unit from a host; and processing the swap data according to a data processing policy of the swap unit and writing the processed swap data to the swap unit. The data processing policy of the swap unit may be different from a data processing policy of the normal unit.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 12, 2015
    Inventors: SUNG YONG SEO, KYUNG HO KIM, SEUNG UK SHIN, YEONG JAE WOO, HYUN JU KIM, JEONG HOON CHO
  • Publication number: 20150046670
    Abstract: A writing method of a storage system which includes a host and a storage connected to the host, includes receiving journal data during a generation of a data writing transaction; inserting in a first map table, a plurality of entries, each entry including a first logical address of a first logical area of the storage and a second logical address of a second logical area of the storage; writing the journal data to a physical area of the storage corresponding to the first logical address; and remapping the physical area from the first logical address onto the second logical address using the plurality of entries when a size of a usable space of the first logical area is less than a desired value.
    Type: Application
    Filed: August 4, 2014
    Publication date: February 12, 2015
    Inventors: Sangmok KIM, Kyung Ho KIM, Yeong-jae WOO, Seunguk SHIN, Sungyong SEO