Abstract: A data storage device includes a nonvolatile memory including a plurality of memory blocks and page buffers for data input/output, the page buffers being electrically connected to the plurality of memory blocks, respectively, and a controller configured to, when a number of free memory blocks among the plurality of memory blocks is equal to or less than a predetermined threshold number, select, as a candidate source memory block group, memory blocks each having a number of valid pages equal to or less than a predetermined number within the nonvolatile memory, select, as a source memory block, a memory block having a minimum amount of time required to read valid data from the valid page within the candidate source memory block group and perform a garbage collection operation to the source memory block.

Abstract: Provided herein may be a memory controller and a method of operating the same. The memory controller may include a command processor configured to generate a flush command in response to a flush request input from an external host and to assign a slot number corresponding to the flush command; a sequence generator configured to determine flush data to be stored in response to the flush command, and to generate a write sequence in which the flush data is to be stored based on a size of the flush data and an assigned device sequence of the plurality of memory devices; and a memory operation controller configured to control the plurality of memory devices to store the flush data in the plurality of memory devices.

Abstract: A memory system includes a nonvolatile memory device including a plurality of dies, each die including a plurality of planes, each plane including a plurality of blocks, each block including a plurality of pages, and further includes a plurality of page buffers, each page buffer for caching data in a unit of a page to be inputted to, and outputted from, each of the blocks; and a controller suitable for managing a plurality of super blocks according to a condition, each super block including N blocks capable of being read in parallel among the blocks, generating predicted required times for the super blocks, respectively, each of the predicted required times representing a time needed to extract valid data from the corresponding super block, and selecting a victim block for garbage collection from among the blocks based on the predicted required times.

Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a nonvolatile memory device that operates in response to a plurality of internal commands received thereby; and a memory controller for generating and queuing the plurality of internal commands in response to a plurality of commands received from a host, and generating and storing a processing completion bitmap index corresponding to the plurality of queued internal commands.

Abstract: A memory system includes a non-volatile memory device including a plurality of memory blocks; and a controller comprising a volatile memory and configured to: store a plurality of write data delivered from a host in the memory blocks to the plurality of memory blocks; and managing mapping information corresponding to the stored write data in the volatile memory, wherein the controller is configured to check whether the plurality of write data are grouped into a transaction, selectively set a transaction flag to the mapping information based on a check result; and selectively store the mapping information in the memory blocks when the transaction flag is not set.

Abstract: Provided herein may be a memory controller and a method of operating the same. The memory controller may include a command processor configured to generate a flush command in response to a flush request input from an external host and to assign a slot number corresponding to the flush command; a sequence generator configured to determine flush data to be stored in response to the flush command, and to generate a write sequence in which the flush data is to be stored based on a size of the flush data and an assigned device sequence of the plurality of memory devices; and a memory operation controller configured to control the plurality of memory devices to store the flush data in the plurality of memory devices.

Abstract: A data storage device includes a nonvolatile memory including a plurality of memory blocks and page buffers for data input/output, the page buffers being electrically connected to the plurality of memory blocks, respectively, and a controller configured to, when a number of free memory blocks among the plurality of memory blocks is equal to or less than a predetermined threshold number, select, as a candidate source memory block group, memory blocks each having a number of valid pages equal to or less than a predetermined number within the nonvolatile memory, select, as a source memory block, a memory block having a minimum amount of time required to read valid data from the valid page within the candidate source memory block group and perform a garbage collection operation to the source memory block.

Abstract: Provided herein may be a memory controller and a method of operating the same. The memory controller may include a command processor configured to generate a flush command in response to a flush request input from an external host and to assign a slot number corresponding to the flush command; a sequence generator configured to determine flush data to be stored in response to the flush command, and to generate a write sequence in which the flush data is to be stored based on a size of the flush data and an assigned device sequence of the plurality of memory devices; and a memory operation controller configured to control the plurality of memory devices to store the flush data in the plurality of memory devices.

Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a semiconductor memory device for including a plurality of semiconductor memories, and operating in response to a plurality of internal commands received thereto; and a controller for generating and queuing the plurality of internal commands in response to a plurality of commands received from a host, and generating and storing a master bitmap including information on unperformed operations that are not performed in the semiconductor memory device for internal commands among the plurality of queued internal commands. The controller generates a flush bitmap corresponding to a flush command, using a current master bitmap, when the flush command is received from the host, and clears the flush bitmap if the semiconductor memory device completes the unperformed operations.

Abstract: A memory system includes a nonvolatile memory device including a plurality of dies, each die including a plurality of planes, each plane including a plurality of blocks, each block including a plurality of pages, and further includes a plurality of page buffers, each page buffer for caching data in a unit of a page to be inputted to, and outputted from, each of the blocks; and a controller suitable for managing a plurality of super blocks according to a condition, each super block including N blocks capable of being read in parallel among the blocks, generating predicted required times for the super blocks, respectively, each of the predicted required times representing a time needed to extract valid data from the corresponding super block, and selecting a victim block for garbage collection from among the blocks based on the predicted required times.

Abstract: Provided herein may be a memory controller and a method of operating the same. The memory controller may include a command processor configured to generate a flush command in response to a flush request input from an external host and to assign a slot number corresponding to the flush command; a sequence generator configured to determine flush data to be stored in response to the flush command, and to generate a write sequence in which the flush data is to be stored based on a size of the flush data and an assigned device sequence of the plurality of memory devices; and a memory operation controller configured to control the plurality of memory devices to store the flush data in the plurality of memory devices.

Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a nonvolatile memory device that operates in response to a plurality of internal commands received thereby; and a memory controller for generating and queuing the plurality of internal commands in response to a plurality of commands received from a host, and generating and storing a processing completion bitmap index corresponding to the plurality of queued internal commands.

Abstract: There are provided a memory system and an operating method thereof. A memory system includes: a semiconductor memory device for including a plurality of semiconductor memories, and operating in response to a plurality of internal commands received thereto; and a controller for generating and queuing the plurality of internal commands in response to a plurality of commands received from a host, and generating and storing a master bitmap including information on unperformed operations that are not performed in the semiconductor memory device for internal commands among the plurality of queued internal commands. The controller generates a flush bitmap corresponding to a flush command, using a current master bitmap, when the flush command is received from the host, and clears the flush bitmap if the semiconductor memory device completes the unperformed operations.

Abstract: A memory system includes a non-volatile memory device including a plurality of memory blocks; and a controller comprising a volatile memory and configured to: store a plurality of write data delivered from a host in the memory blocks to the plurality of memory blocks; and managing mapping information corresponding to the stored write data in the volatile memory, wherein the controller is configured to check whether the plurality of write data are grouped into a transaction, selectively set a transaction flag to the mapping information based on a check result; and selectively store the mapping information in the memory blocks when the transaction flag is not set.

Abstract: A data storage device and method for operating the data storage device are disclosed. The data storage device includes a memory device including a plurality of memory regions, and a controller for selecting one or more candidate memory regions among the plurality of memory regions based on erase counts of the plurality of memory regions, and determining an adjustment value based on the number of candidate memory regions. The controller selects a number of victim memory regions among the one or more candidate memory regions, and performs a garbage collection operation on the selected number of victim memory regions. The number of victim memory regions may be equal to or less than the adjustment value, for example. The controller may determine whether candidate memory regions exist for which garbage collection has not been performed, and may select victim memory regions depending on amounts of valid data stored therein and a number of free memory regions.

Abstract: A data storage device includes a memory device including a plurality of memory regions; and a controller suitable for selecting one or more candidate memory regions among the plurality of memory regions based on erase counts of the plurality of memory regions, determining an adjustment value based on the number of the candidate memory regions, selecting victim memory regions by the number that is equal to or less than the adjustment value among the candidate memory regions, and performing a garbage collection operation to the selected victim memory regions.

Abstract: A data storage device includes a nonvolatile memory device including a plurality of memory areas; and a controller configured to perform a reclaim operation for the plurality of memory areas, based on read counts of the plurality of memory areas, increase a reclaim count of the plurality of memory areas, and perform a wear leveling operation for the plurality of memory areas, based on the reclaim count.

Abstract: A memory system and an operating method thereof stably supplies power, so that it is possible to improve performance of a memory system by omitting an operation, which has been performed in order to prevent an error due to the blocking of a power supply, in a condition in which an error due to the blocking of the power supply may not be generated.

Abstract: A memory system may include a plurality of memory devices each including a plurality of memory blocks, suitable for copying data of valid pages included in a victim block selected from the plurality of memory blocks into a target block by sharing a buffer memory, during a garbage collection operation, and a buffer manager suitable for sequentially copying the data to an available area of the buffer memory.

Abstract: A data processing system includes a host device including a first working memory and a data storage device suitable for responding to an access request from the host device. The data storage device includes a controller suitable for controlling an operation of the data storage device, a second working memory suitable for storing data used for driving of the controller, and an access controller suitable for accessing a shared memory region of the first working memory under the control of the controller.