Abstract: A pixel circuit includes a first transistor including a gate terminal which receives a first gate signal, a first terminal connected to a first node, and a second terminal connected to a second node, an inverter including a first sub-transistor including a gate terminal connected to the first node, a first terminal which receives a driving voltage, and a second terminal connected to the second node, and a second sub-transistor including a gate terminal connected to the first node, a first terminal which receives a ground voltage, a second terminal connected to the second node, and a light emitting element including an anode connected to the second node and a cathode which receives the ground voltage.

Abstract: A pixel includes a light-emitting element, a pulse width modulator controlling an emission time duration of the light-emitting element based on a data voltage, and a constant current generator providing a driving current having a constant level to the light-emitting element based on a constant current generation voltage. The pulse width modulator includes a first driving transistor, and an N-type transistor connected to a gate electrode, a first electrode and a second electrode of the first driving transistor. The constant current generator includes a second driving transistor, and an N-type transistor connected to a gate electrode, a first electrode and a second electrode of the second driving transistor.

Abstract: A display device includes a plurality of pixels. Each of the plurality of pixels includes a light emitting element, a PWM circuit that controls an emission time of the light emitting element based on a PWM data voltage, a sweep voltage, and a reference voltage, a CCG circuit that provides a constant driving current to the light emitting element based on a constant current data voltage and a power supply voltage, and a connection switch that connects the PWM circuit to the CCG circuit. The light emitting elements substantially simultaneously start emitting light at a start time point of an emission period. In each pixel, the PWM circuit transfers the reference voltage to the CCG circuit through the connection switch at a time point corresponding to a voltage level of the PWM data voltage, and the CCG circuit causes the light emitting element to stop emitting light.

Abstract: A pixel circuit includes a first transistor including a control electrode electrically connected to a first node, a first electrode electrically connected to a second node and a second electrode electrically connected to a third node, a second transistor configured to apply a first data voltage to the first transistor, a third transistor electrically connected to the first node and the third node, a fourth transistor including a control electrode electrically connected to a fourth node, a first electrode electrically connected to a fifth node and a second electrode electrically connected to a sixth node, a fifth transistor configured to apply a second data voltage to the fourth transistor, a sixth transistor electrically connected to the fourth node and the sixth node and a light emitting element that emits light based on the first data voltage and the second data voltage.

Abstract: A display device includes: a substrate including a first pixel area and a second pixel area adjacent to each other along a first direction; a first pixel in the first pixel area on the substrate and including a first pixel electrode; a second pixel in the second pixel area on the substrate and including a second pixel electrode; and a repair pattern on the first pixel electrode and the second pixel electrode, contacting with the first pixel electrode and the second pixel electrode, and electrically connecting the first pixel and the second pixel.

Abstract: A display panel is disclosed that includes a first pixel, a second pixel and an initialization transistor. The first pixel includes a first light emitting element configured to emit light based on a data writing gate signal, an initialization gate signal, a compensation gate signal, an emission signal and a first data voltage. The second pixel includes a second light emitting element configured to emit light based on the data writing gate signal, the initialization gate signal, the compensation gate signal, the emission signal and a second data voltage. The initialization transistor is commonly connected to the first pixel and the second pixel. The initialization transistor is configured to output an initialization voltage to the first pixel and the second pixel in response to the initialization gate signal.

Abstract: A pixel circuit is disclosed that includes first through sixth transistors, first and second capacitors, and a light emitting element. A gate electrode of the second transistor receives a first gate signal. A gate electrode of the third transistor receive a second gate signal. Gate electrodes of each of the fourth and fifth transistors receive a third gate signal. A gate electrode of the sixth transistor receives an emission signal. First electrodes of the first transistor and the first capacitor each receive a first power supply voltage. A cathode electrode of the light emitting element receives a second power supply voltage. A first electrode of the fourth transistor receives an initialization voltage.

Abstract: A pixel circuit includes a first transistor connected to a gate node, receiving a first power voltage, and connected to a second node, a second transistor receiving a data writing gate signal, receiving a data voltage, and connected to a first node, a third transistor receiving a compensation gate signal, connected to the gate node, and connected to the second node, a fourth transistor receiving an initialization gate signal, receiving an initialization voltage, and connected to the gate node, a fifth transistor receiving the initialization gate signal, connected to the first node, and connected to an anode node, a sixth transistor receiving an emission signal, connected to the second node, and connected to the anode node, and a light emitting element connected to the anode node and receiving a second power voltage.

Abstract: A pixel circuit includes a light emitting element, a first transistor that provides a driving current to the light emitting element, a first capacitor including a first electrode connected to a control electrode of the first transistor and a second electrode connected to a first electrode of the first transistor, a second capacitor including a first electrode directly connected to the control electrode of the first transistor and a second electrode, and a second transistor that provides a data voltage to the control electrode of the first transistor in response to a write gate signal.

Abstract: A pixel circuit is disclosed that includes first through sixth transistors, first and second capacitors, and a light emitting element. A gate electrode of the second transistor receives a first gate signal. A gate electrode of the third transistor receive a second gate signal. Gate electrodes of each of the fourth and fifth transistors receive a third gate signal. A gate electrode of the sixth transistor receives an emission signal. First electrodes of the first transistor and the first capacitor each receive a first power supply voltage. A cathode electrode of the light emitting element receives a second power supply voltage. A first electrode of the fourth transistor receives an initialization voltage.

Abstract: A pixel circuit includes a light emitting element, a first transistor that applies a driving current to the light emitting element, a second transistor that writes a data voltage in response to a write gate signal, a first capacitor connected to a control electrode of the first transistor, a second capacitor including a first electrode connected to the second transistor and a second electrode connected to the control electrode of the first transistor, a third transistor that diode-connects the first transistor in response to a compensation gate signal, a fourth transistor that applies an initialization voltage to the control electrode of the first transistor in response to a first initialization gate signal, and a fifth transistor that transmits the driving current to the light emitting element in response to an emission signal.

Abstract: A display panel and a display device having an emission control driver are discussed. The display device can include a display panel to display an image through sub pixels, a scan driver to supply a second scan signal to each of second gate lines, and an emission control driver to supply an emission control signal to each of third gate lines and supply a first scan signal to each of first gate lines. Each emission control stage of the emission control driver can include an output buffer. The output buffer can output an emission control signal to an output line and output a first scan signal to a scan output line under control of a first control node, and output a high potential power supply voltage to the output line and output a low potential power supply voltage to the scan output line under control of a second control node.

Abstract: A display panel and a display device having an emission control driver are discussed. The display device can include a display panel for displaying an image through sub pixels, and an emission control driver configured to supply a plurality of emission control signals to the sub pixels. The emission control driver can include a plurality of emission control stages configured to supply the plurality of emission control signals, respectively. Each emission control stage can include an output buffer including a first pull-up transistor configured to output a first high potential power supply voltage to an output line by a Q node, and a first pull-down transistor configured to output a first low potential power supply voltage to the output line by a QB node.

Abstract: A display panel and a display device having an emission control driver are discussed. The display device can include a display panel for displaying an image through sub pixels, and an emission control driver configured to supply a plurality of emission control signals to the sub pixels. The emission control driver can include a plurality of emission control stages configured to supply the plurality of emission control signals, respectively. Each emission control stage can include an output buffer including a first pull-up transistor configured to output a first high potential power supply voltage to an output line by a Q node, and a first pull-down transistor configured to output a first low potential power supply voltage to the output line by a QB node.

Abstract: A display panel and a display device having an emission control driver are discussed. The display device can include a display panel to display an image through sub pixels, a scan driver to supply a second scan signal to each of second gate lines, and an emission control driver to supply an emission control signal to each of third gate lines and supply a first scan signal to each of first gate lines. Each emission control stage of the emission control driver can include an output buffer. The output buffer can output an emission control signal to an output line and output a first scan signal to a scan output line under control of a first control node, and output a high potential power supply voltage to the output line and output a low potential power supply voltage to the scan output line under control of a second control node.

Abstract: A thin film transistor substrate and a display device comprising the same are provided, in which the thin film transistor substrate comprises a first thin film transistor on a base substrate, and a second thin film transistor on the first thin film transistor, wherein the first thin film transistor includes a first active layer on the base substrate, a first gate electrode spaced apart from the first active layer, and a first source electrode and a first drain electrode, which are spaced apart from each other and connected to the first active layer, the second thin film transistor includes a second active layer on the base substrate, a second gate electrode spaced apart from the second active layer, and a second source electrode and a second drain electrode, which are spaced apart from each other and connected to the second active layer, and one of the first source electrode and the first drain electrode is connected to one of the second source electrode and the second drain electrode.

Abstract: Provided a robot for assisting hearing of a user, while minimizing an influence on the surroundings. The robot includes a speaker, a microphone configured to recognize a voice, a processor configured to acquire a position of a user's face when a hearing aid command is acquired on the basis of the voice recognized through the microphone, and a driving unit configured to cause the speaker to be moved toward the position of the user's face, wherein the processor acquires a sound which is a target of hearing aid, generates an assistant sound by amplifying a predetermined frequency band of the sound or converting the predetermined frequency band of the sound into a different frequency band, and outputs the assistant sound through the speaker.

Abstract: A display apparatus comprises a display panel on which a plurality of pixels are displayed, a plurality of signal lines to which a signal required to drive the display panel is supplied, and an electrostatic discharge circuit connected between each of the plurality of signal lines and the electrostatic discharge line. The electrostatic discharge circuit includes first and second current paths between the signal line and the electrostatic discharge line, a first electrostatic discharge circuit connected to the first current path, including a plurality of first thin film transistors having a first gate electrode connected to the second current path and a second gate electrode connected to the first current path, and a second electrostatic discharge circuit connected to the second current path, including at least one second thin film transistor having a first gate electrode connected to the first current path and a second gate electrode connected to the first current path.

Abstract: A display device having a gate driver, which may reduce a leakage current of a TFT and power consumption, is disclosed.

Abstract: A display device having a gate driver, which may reduce a leakage current of a TFT and power consumption, is disclosed.