Patents by Inventor Yeow Ng
Yeow Ng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11901186Abstract: Disclosed is a method of reducing surface unevenness of a semiconductor wafer (100). In a preferred embodiment, the method comprises: removing a portion of a deposited layer and a protective layer thereon using a first slurry to provide an intermediate surface (1123). In the described embodiment, the deposited layer includes an epitaxial layer (112) and the protective layer includes a first dielectric layer (113). The first slurry includes particles with a hardness level the same as or exceeding that of the epitaxial layer (112). A slurry for use in wafer fabrication for reducing surface unevenness of a semiconductor wafer is also disclosed.Type: GrantFiled: February 19, 2019Date of Patent: February 13, 2024Assignees: Massachusetts Institute of Technology, Nanyang Technological University, National University of SingaporeInventors: Li Zhang, Kwang Hong Lee, Keith Cheng Yeow Ng, Kenneth Eng Kian Lee, Eugene A. Fitzgerald, Soo Jin Chua, Chuan Seng Tan
-
Publication number: 20230355014Abstract: Training chopsticks including a lower chopstick having a longitudinal end, an oppositely longitudinal end, an upper side, a lower side, a lateral side, and an oppositely lateral side; an upper chopstick having an upper side, a lower side, a longitudinal end, an oppositely longitudinal end, a lateral side, and an oppositely lateral side; at least a first arm having proximal and distal ends, the at least first arm's proximal end being fixedly attached to or formed wholly with the lower chopstick; a longitudinally extending slide track fixedly attached to or formed wholly with the upper chopstick; and a pin fixedly attached to or formed wholly with the at least first arm's distal end, the pin operatively engaging the longitudinally extending slide track.Type: ApplicationFiled: July 13, 2023Publication date: November 9, 2023Inventor: Yeow Ng
-
Publication number: 20230309726Abstract: Training chopsticks including an upper chopstick having a forward end, a rearward end, an upper side, a lower side, a lateral side, and an oppositely lateral side; a lower chopstick having a forward end, a rearward end, an upper side, a lower side, a lateral side, and an oppositely lateral side; a first finger loop extending upwardly from the upper chopstick; a second finger loop extending downwardly from the upper chopstick; a third finger loop extending downwardly from the lower chopstick; a first slot attaching the first finger loop to the upper chopstick; a second slot attaching the second finger loop to the upper chopstick, the second mounting means positioning the second finger loop forwardly from the first finger loop; and a third slot attaching the third finger loop to the lower chopstick.Type: ApplicationFiled: June 7, 2023Publication date: October 5, 2023Inventor: Yeow Ng
-
Publication number: 20220293820Abstract: A method of fabricating a semiconductor device (200) is described. According to a described embodiment, the method comprises: (i) forming a 111-V semiconductor material layer (206) comprising a substrate layer (208) and a device layer (210) attached to the substrate layer (208); and (ii) forming an electrically conductive interlayer (228) to the device layer (210) prior to bonding the electrically conductive interlayer (228) to a partially processed CMOS device layer (204) having at least one transistor (205).Type: ApplicationFiled: September 25, 2020Publication date: September 15, 2022Applicant: NEW SILICON CORPORATION PTE LTDInventors: Eugene A. Fitzgerald, Kenneth Eng Kian Lee, Chen Yeow NG, Fayyaz Moiz Singaporewala
-
Patent number: 11147202Abstract: A wheeled hand truck incorporating a footplate; a segmented retainer flange; a left pin pivotally mounting a left segment of the retainer flange and allowing sliding flange motion to a clearance elevation; a right pin pivotally mounting a right segment of the retainer flange and allowing sliding flange motion to the clearance elevation; left and right stops extending downwardly from the left and right flange segments; and left and right pairs of sockets positioned for, upon alternative motions of the left and right flange segments toward and away from the clearance elevation, and upon forward and rearward pivoting of the left and right flange segments, alternately holding the left and right flange segments at laterally and forwardly extending positions.Type: GrantFiled: December 26, 2018Date of Patent: October 19, 2021Inventor: Yeow Ng
-
Publication number: 20200388501Abstract: Disclosed is a method of reducing surface unevenness of a semiconductor wafer (100). In a preferred embodiment, the method comprises: removing a portion of a deposited layer and a protective layer thereon using a first slurry to provide an intermediate surface (1123). In the described embodiment, the deposited layer includes an epitaxial layer (112) and the protective layer includes a first dielectric layer (113). The first slurry includes particles with a hardness level the same as or exceeding that of the epitaxial layer (112). A slurry for use in wafer fabrication for reducing surface unevenness of a semiconductor wafer is also disclosed.Type: ApplicationFiled: February 19, 2019Publication date: December 10, 2020Applicants: Massachusetts Institute of Technology, Nanyang Technological University, National University of SingaporeInventors: Li Zhang, Kwang Hong Lee, Keith Cheng Yeow Ng, Kenneth Eng Kian Lee, Eugene A. Fitzgerald, Soo Jin Chua, Chuan Seng Tan
-
Publication number: 20190124818Abstract: A wheeled hand truck incorporating a footplate; a segmented retainer flange; a left pin pivotally mounting a left segment of the retainer flange and allowing sliding flange motion to a clearance elevation; a right pin pivotally mounting a right segment of the retainer flange and allowing sliding flange motion to the clearance elevation; left and right stops extending downwardly from the left and right flange segments; and left and right pairs of sockets positioned for, upon alternative motions of the left and right flange segments toward and away from the clearance elevation, and upon forward and rearward pivoting of the left and right flange segments, alternately holding the left and right flange segments at laterally and forwardly extending positions.Type: ApplicationFiled: December 26, 2018Publication date: May 2, 2019Inventor: Yeow Ng
-
Publication number: 20190128464Abstract: A stopper assembly incorporating an elastic conical body having a forward end and a rearward end; a base attached to the conical body's rearward end; and a pair of sockets opening at the base; and a method for using the stopper assembly including steps of providing the stopper assembly and needle nose pliers; grasping the pliers' handles and splaying pliers' jaws; inserting the nose of each such jaw into one of the sockets; squeezing the pliers' handles for clamping the pair of sockets between the pliers' jaws; moving the pliers, the base, and the elastic conical body toward and into the port; and simultaneously driving and twisting the pliers and the stopper assembly.Type: ApplicationFiled: December 26, 2018Publication date: May 2, 2019Inventor: Yeow Ng
-
Patent number: 8714275Abstract: A turf aerator comprising a foot plate having an upper surface, a lower surface, a front end, a rearward end, a left side, and a right side; at least a first turf coring tine fixedly attached to and extending downwardly from the foot plate; a lever arm fixedly attached to and extending upwardly from the foot plate; and a ground contacting fulcrum fixedly attached to and extending rearwardly from the foot plate.Type: GrantFiled: April 26, 2010Date of Patent: May 6, 2014Inventor: Yeow Ng
-
Patent number: 7806938Abstract: A method and apparatus are described that control the supply of electrical power to one or more components of a computing device. Other embodiments are described and claimed.Type: GrantFiled: June 16, 2005Date of Patent: October 5, 2010Assignee: Intel CorporationInventors: Eng Yeow Ng, Ze-Yng Cheong, Choon Hooi Khor
-
Patent number: 7721414Abstract: A method of manufacturing a 3-D spiral stacked inductor is provided having a substrate with a plurality of turns in a plurality of levels wherein the number of levels increases from an inner turn to the outer turn of the inductor. First and second connecting portions are respectively connected to an inner turn and an outermost turn, and a dielectric material contains the first and second connecting portions and the plurality of turns over the substrate.Type: GrantFiled: October 8, 2004Date of Patent: May 25, 2010Assignee: Chartered Semiconductor Manufacturing Ltd.Inventors: Choon-Beng Sia, Kiat Seng Yeo, Shao-fu Sanford Chu, Cheng Yeow Ng, Kok Wai Chew, Wang Ling Goh
-
Publication number: 20050116350Abstract: A thin Titanium underlayer 22 is included beneath a Titanium rich Titanium Nitride layer 28 in a metal line 20 on a silicon substrate to reduce stress voiding.Type: ApplicationFiled: January 20, 2003Publication date: June 2, 2005Applicant: Systems on Silicon Manufacturing Co. PTE. LTD.Inventors: Khim Ng, Yeow Ng, Kar Koh
-
Patent number: 6841847Abstract: A 3-D spiral stacked inductor is provided having a substrate with a plurality of turns in a plurality of levels wherein the number of levels increases from an inner turn to the outer turn of the inductor. First and second connecting portions are respectively connected to an inner turn and an outermost turn, and dielectric material contains the first and second connecting portions and the plurality of turns over the substrate.Type: GrantFiled: September 4, 2002Date of Patent: January 11, 2005Assignee: Chartered Semiconductor Manufacturing, Ltd.Inventors: Choon-Beng Sia, Kiat Seng Yeo, Shao-fu Sanford Chu, Cheng Yeow Ng, Kok Wai Chew, Wang Ling Goh
-
Publication number: 20040041234Abstract: A parallel spiral stacked inductor and manufacturing method therefore is provided. A substrate has a plurality of turns in a plurality of levels, the plurality of turns having a center proximate and a center distal ends. A first plurality of vias connecting the center proximate ends of the plurality of turns and a second plurality of vias connecting the center distal ends of the plurality of turns. A first connecting portion connects to the center proximate ends of the plurality of turns and a second connecting portion connecting to the center distal end of the plurality of turns. A dielectric material contains the inductor.Type: ApplicationFiled: September 4, 2002Publication date: March 4, 2004Inventors: Choon-Beng Sia, Kiat Seng Yeo, Shao-fu Sanford Chu, Cheng Yeow Ng, Kok Wai Chew, Wang Ling Goh
-
Patent number: 6684960Abstract: A turf aerator consisting of a cast concrete roller having an axis of rotation, and having an annular surface displaced radially away from the axis of rotation; first and second radial arrays of tubular tines, each tine among the radial arrays having inner and outer ends, and having soil input and soil output ports; and mounting lug and tine receiving channel combinations attaching the radial arrays of tubular tines to opposite ends of the concrete roller so that the outer ends of such tines extend outwardly from the annular surface of the roller, and so that the inner ends of the tines extend inwardly from the annular surface.Type: GrantFiled: January 28, 2002Date of Patent: February 3, 2004Inventors: Cheong-Yeow Ng, Yuet-Leng Wong
-
Patent number: 6650220Abstract: A parallel spiral stacked inductor and manufacturing method therefore is provided. A substrate has a plurality of turns in a plurality of levels, the plurality of turns having a center proximate and a center distal ends. A first plurality of vias connecting the center proximate ends of the plurality of turns and a second plurality of vias connecting the center distal ends of the plurality of turns. A first connecting portion connects to the center proximate ends of the plurality of turns and a second connecting portion connecting to the center distal end of the plurality of turns. A dielectric material contains the inductor.Type: GrantFiled: April 23, 2002Date of Patent: November 18, 2003Assignee: Chartered Semiconductor Manufacturing Ltd.Inventors: Choon-Beng Sia, Kiat Seng Yeo, Toe Naing Swe, Cheng Yeow Ng, Alex See
-
Publication number: 20030197586Abstract: A parallel spiral stacked inductor and manufacturing method therefore is provided. A substrate has a plurality of turns in a plurality of levels, the plurality of turns having a center proximate and a center distal ends. A first plurality of vias connecting the center proximate ends of the plurality of turns and a second plurality of vias connecting the center distal ends of the plurality of turns. A first connecting portion connects to the center proximate ends of the plurality of turns and a second connecting portion connecting to the center distal end of the plurality of turns. A dielectric material contains the inductor.Type: ApplicationFiled: April 23, 2002Publication date: October 23, 2003Inventors: Choon-Beng Sia, Kiat Seng Yeo, Toe Naing Swe, Cheng Yeow Ng, Alex See
-
Patent number: 6284590Abstract: A method for fabricating a metal-insulator-metal capacitor wherein top metal corner shaping during patterning is eliminated is described. An insulating layer is provided overlying a semiconductor substrate. A first metal layer is deposited over the insulating layer. A capacitor dielectric layer is deposited overlying the first metal layer. A second metal layer is deposited overlying the capacitor dielectric layer and patterned to form a top metal electrode. A flowable material layer is deposited overlying the capacitor dielectric and the top metal electrode and anisotropically etched away to leave spacers on sidewalls of the top metal electrode. A photoresist mask is formed overlying the capacitor dielectric and the top metal electrode wherein the spacers provide extra photoresist thickness at the sidewalls of the top metal layer.Type: GrantFiled: November 30, 2000Date of Patent: September 4, 2001Assignee: Chartered Semiconductor Manufacturing Ltd.Inventors: Randall Cher Liang Cha, Cheng Yeow Ng, Shao-Fu Sanford Chu, Tae Jong Lee, Chua Chee Tee
-
Patent number: D941882Type: GrantFiled: February 12, 2021Date of Patent: January 25, 2022Inventor: Yeow Ng