Patents by Inventor Yeseung Lee

Yeseung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5968840
    Abstract: The present invention discloses a method for making a dynamic random access memory by silicon-on-insulator comprising the steps of: dividing a cell area and a peripheral area on a first silicon substrate and recessing just the cell area where a memory device is formed; forming a first insulating layer by isolation of electrical elements in order to divide an active region and a passive region; forming and patterning a first conductive layer through a contact to which the active region and a capacitor are connected on the insulating layer to form a storage node; forming a dielectric layer of the capacitor on the storage node; forming and patterning a polysilicon layer on the dielectric layer to form a storage node; forming a second insulating layer on the plate node and planarizing the insulating layer by thermal treatment; forming a third conductive layer to a predetermined thickness on the planarized insulating layer; polishing and planarizing the third conductive layer by chemical-mechanical polishing techn
    Type: Grant
    Filed: May 11, 1995
    Date of Patent: October 19, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyucharn Park, Yeseung Lee, Cheonsu Ban, Kyungwook Lee
  • Patent number: 5939745
    Abstract: The present invention discloses a method for making a dynamic random access memory by silicon-on-insulator comprising the steps of: dividing a cell area and a peripheral area on a first silicon substrate and recessing just the cell area where a memory device is formed; forming a first insulating layer by isolation of electrical elements in order to divide an active region and a passive region; forming and patterning a first conductive layer through a contact to which the active region and a capacitor are connected on the insulating layer to form a storage node; forming a dielectric layer of the capacitor on the storage node; forming and patterning a polysilicon layer on the dielectric layer to form a storage node; forming a second insulating layer on the plate node and planarizing the insulating layer by thermal treatment; forming a third conductive layer to a predetermined thickness on the planarized insulating layer; polishing and planarizing the third conductive layer by chemical-mechanical polishing techn
    Type: Grant
    Filed: April 15, 1997
    Date of Patent: August 17, 1999
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyucharn Park, Yeseung Lee, Cheonsu Ban, Kyungwook Lee
  • Patent number: 5631186
    Abstract: The present invention discloses a method for making a dynamic random access memory by silicon-on-insulator comprising the steps of: dividing a cell area and a peripheral area on a first silicon substrate and recessing just the cell area where a memory device is formed; forming a first insulating layer by isolation of electrical elements in order to divide an active region and a passive region; forming and patterning a first conductive layer through a contact to which the active region and a capacitor are connected on the insulating layer to form a storage node; forming a dielectric layer of the capacitor on the storage node; forming and patterning a polysilicon layer on the dielectric layer to form a storage node; forming a second insulating layer on the plate node and planarizing the insulating layer by thermal treatment; forming a third conductive layer to a predetermined thickness on the planarized insulating layer; polishing and planarizing the third conductive layer by chemical-mechanical polishing techn
    Type: Grant
    Filed: December 28, 1995
    Date of Patent: May 20, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyucharn Park, Yeseung Lee, Cheonsu Ban, Kyungwook Lee