Patents by Inventor Yeshwant N. Kolla

Yeshwant N. Kolla has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7242624
    Abstract: Techniques for reducing power when reading a full-swing memory array are disclosed. The full-swing memory array includes a plurality of local bit lines and a global bit line. In order to reduce power consumption, a method of driving the global bit line includes the step of coupling the plurality of local bit lines to the global bit line through a plurality of tri-state devices. The method further includes the steps of generating a global select signal to enable one of the plurality of tri-state devices and selecting a corresponding local bit line to drive the output of the enabled tri-state device. In this way, the global bit line is statically driven so that consecutive reads of bits having the same value read over the global bit line do not result in transitioning the state of the global bit line.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: July 10, 2007
    Assignee: QUALCOMM Incorporated
    Inventors: Yeshwant N. Kolla, Gregory Christopher Burda, Jeffrey Herbert Fischer