Patents by Inventor Yeu-Yang WANG

Yeu-Yang WANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device having a serpentine shape isolation
    Patent number: 11133316
    Abstract: The disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a first and a second polysilicon layers on the substrate, a third polysilicon layer between the first and the second polysilicon layers, a first isolation layer adjacent with the first to the third polysilicon layers, a gate dielectric layer and a gate conductive layer in the third polysilicon layer, a second isolation layer on the gate conductive layer and the third polysilicon layer, a third isolation layer on the first the second isolation layers, a bit line via contact through the first and the third isolation layers, and a conductive layer on the bit line via contact and the third isolation layer. The third polysilicon layer has a concave portion between the first and the second polysilicon layers.
    Type: Grant
    Filed: January 30, 2020
    Date of Patent: September 28, 2021
    Assignee: Hexas Technology Corp.
    Inventors: Chen-Chih Wang, Yeu-Yang Wang
  • SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
    Publication number: 20210028181
    Abstract: The disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a first and second polysilicon layers on the substrate, a third polysilicon layer between the first and the second polysilicon layers, a first isolation layer adjacent with the first to the third polysilicon layers, a gate dielectric layer and a gate conductive layer embedded in the third polysilicon layer, a second isolation layer on the gate conductive layer and the third polysilicon layer. The third polysilicon layer has a concave portion between the first and the second polysilicon layers, and the concave portion is defined as a main body. The main body includes a bulk region. The gate conductive layer facing toward the concave portion serves as a gate.
    Type: Application
    Filed: July 22, 2020
    Publication date: January 28, 2021
    Inventors: Chen-Chih WANG, Li-Wei HO, Yeu-Yang WANG
  • Semiconductor Device and Fabrication Method thereof
    Publication number: 20200303380
    Abstract: The disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a first and a second polysilicon layers on the substrate, a third polysilicon layer between the first and the second polysilicon layers, a first isolation layer adjacent with the first to the third polysilicon layers, a gate dielectric layer and a gate conductive layer in the third polysilicon layer, a second isolation layer on the gate conductive layer and the third polysilicon layer, a third isolation layer on the first the second isolation layers, a bit line via contact through the first and the third isolation layers, and a conductive layer on the bit line via contact and the third isolation layer. The third polysilicon layer has a concave portion between the first and the second polysilicon layers.
    Type: Application
    Filed: January 30, 2020
    Publication date: September 24, 2020
    Inventors: Chen-Chih WANG, Yeu-Yang WANG