Patents by Inventor YEUK-KEUNG FUNG

YEUK-KEUNG FUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11940698
    Abstract: An LCoS panel and a method of preparation includes wafer level packaging, manufacturing vias through a silicon substrate in each die area of a wafer substrate, and manufacturing conductive interfaces on a back surface of the wafer substrate. Each conductive interface corresponds to one via and so connected to an active circuit of the die area where the conductive interface is located. Liquid crystal packaging is applied, a seal coated to surround the pixel circuit area of the active circuit on a front surface of the wafer substrate, injecting liquid crystal into a space defined by the seal, the seal coupling glass substrate comprising a transparent conductive layer and the wafer substrate, and then cutting. Wafer level chip scale packaging of the LCoS panels is thus achieved, the cost is reduced, the obtained LCoS panels are small in total area and of greater thinness.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: March 26, 2024
    Assignee: Advanced Silicon Display Optoelectronics Corporation Ltd.
    Inventors: Yeuk-Keung Fung, Kuo-Lung Huang
  • Publication number: 20220229337
    Abstract: An LCoS panel and a method of preparation includes wafer level packaging, manufacturing vias through a silicon substrate in each die area of a wafer substrate, and manufacturing conductive interfaces on a back surface of the wafer substrate. Each conductive interface corresponds to one via and so connected to an active circuit of the die area where the conductive interface is located. Liquid crystal packaging is applied, a seal coated to surround the pixel circuit area of the active circuit on a front surface of the wafer substrate, injecting liquid crystal into a space defined by the seal, the seal coupling glass substrate comprising a transparent conductive layer and the wafer substrate, and then cutting. Wafer level chip scale packaging of the LCoS panels is thus achieved, the cost is reduced, the obtained LCoS panels are small in total area and of greater thinness.
    Type: Application
    Filed: January 21, 2022
    Publication date: July 21, 2022
    Inventors: YEUK-KEUNG FUNG, KUO-LUNG HUANG