Patents by Inventor Yew Yin Ng

Yew Yin Ng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9858009
    Abstract: Data that is initially stored in Single Level Cell (SLC) blocks is subsequently copied (folded) to a Multi Level Cell (MLC) block where the data is stored in MLC format, the data copied in a minimum unit of a fold-set, the MLC block including a plurality of separately-selectable sets of NAND strings, data of an individual fold-set copied exclusively to two or more word lines of an individual separately-selectable set of NAND strings in the MLC block.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: January 2, 2018
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Abhijeet Bhalerao, Mrinal Kochar, Dennis S. Ea, Mikhail Palityka, Aaron Lee, Yew Yin Ng, Ivan Baran
  • Patent number: 9760303
    Abstract: Partially-bad blocks are identified in a 3-D block-erasable nonvolatile memory, each partially-bad block having one or more inoperable separately-selectable sets of NAND strings and one or more operable separately-selectable sets of NAND strings. Operable sets of NAND strings within two or more partially-bad blocks are identified and are mapped to form one or more virtual blocks that are individually assigned virtual block addresses. The virtual block address are maintained in a list and used to access the virtual blocks.
    Type: Grant
    Filed: September 29, 2015
    Date of Patent: September 12, 2017
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventors: Dennis S. Ea, Ivan Baran, Aaron Lee, Mrinal Kochar, Mikhail Palityka, Yew Yin Ng, Abhijeet Bhalerao
  • Patent number: 9728262
    Abstract: Non-volatile memory systems with multi-write direction memory units are disclosed. In one implementation an apparatus comprises a non-volatile memory and a controller in communication with the non-volatile memory. The controller is configured to select an empty memory block of the non-volatile memory for the storage of data; examine an identifier associated with the memory block to determine a write direction for the storage of data; and write data to the memory block beginning with an initial word line of the memory block or a last word line of the memory block dependent on the write direction. The controller is further configured to erase the memory unit and, in response to erasing the memory unit, modify the identifier to change the write direction for a subsequent write of data to the memory block.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: August 8, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Ivan Baran, Aaron Lee, Mrinal Kochar, Mikhail Palityka, Dennis Ea, Yew Yin Ng, Abhijeet Bhalerao
  • Publication number: 20170125104
    Abstract: Non-volatile memory systems with multi-write direction memory units are disclosed. In one implementation an apparatus comprises a non-volatile memory and a controller in communication with the non-volatile memory. The controller is configured to select an empty memory block of the non-volatile memory for the storage of data; examine an identifier associated with the memory block to determine a write direction for the storage of data; and write data to the memory block beginning with an initial word line of the memory block or a last word line of the memory block dependent on the write direction. The controller is further configured to erase the memory unit and, in response to erasing the memory unit, modify the identifier to change the write direction for a subsequent write of data to the memory block.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 4, 2017
    Applicant: SanDisk Technologies Inc.
    Inventors: Ivan Baran, Aaron Lee, Mrinal Kochar, Mikhail Palityka, Dennis Ea, Yew Yin Ng, Abhijeet Bhalerao
  • Publication number: 20170115884
    Abstract: Data that is initially stored in Single Level Cell (SLC) blocks is subsequently copied (folded) to a Multi Level Cell (MLC) block where the data is stored in MLC format, the data copied in a minimum unit of a fold-set, the MLC block including a plurality of separately-selectable sets of NAND strings, data of an individual fold-set copied exclusively to two or more word lines of an individual separately-selectable set of NAND strings in the MLC block.
    Type: Application
    Filed: October 26, 2015
    Publication date: April 27, 2017
    Inventors: Abhijeet Bhalerao, Mrinal Kochar, Dennis S. Ea, Mikhail Palityka, Aaron Lee, Yew Yin Ng, Ivan Baran
  • Publication number: 20170090762
    Abstract: Partially-bad blocks are identified in a 3-D block-erasable nonvolatile memory, each partially-bad block having one or more inoperable separately-selectable sets of NAND strings and one or more operable separately-selectable sets of NAND strings. Operable sets of NAND strings within two or more partially-bad blocks are identified and are mapped to form one or more virtual blocks that are individually assigned virtual block addresses. The virtual block address are maintained in a list and used to access the virtual blocks.
    Type: Application
    Filed: September 29, 2015
    Publication date: March 30, 2017
    Inventors: Dennis S. Ea, Ivan Baran, Aaron Lee, Mrinal Kochar, Mikhail Palityka, Yew Yin Ng, Abhijeet Bhalerao
  • Patent number: 9548105
    Abstract: Apparatus and method for performing a post-write read in a memory device are disclosed. A memory device may include 3-dimensional memory, with the wordlines in a memory block each having multiple strings. Periodically, the memory device may analyze the wordlines for defects by performing a post-write read on a respective wordline and analyzing the read data to determine whether the respective wordline is defective. Rather than reading all of the strings for the respective wordline, less than all of the strings (such as only one of the strings) for the respective wordline are read. In this way, determining whether the respective wordline in 3-dimensional memory may be performed more quickly.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: January 17, 2017
    Assignee: SanDisk Technologies LLC
    Inventors: Aaron Lee, Mrinal Kochar, Yew Yin Ng
  • Publication number: 20160180945
    Abstract: A method of searching for a boundary between a written portion and an unwritten portion of an open block may include performing a word line by word line binary search of a first physical area of the open block to identify a last written word line of the first physical area of the block, and subsequently, searching in at least a second physical area of the open block based on the last written word line of the first physical area of the block as identified by the binary search.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Inventors: Yew Yin Ng, Gautam Dusija, Dennis Ea, Mrinal Kochar
  • Patent number: 9361991
    Abstract: A method of searching for a boundary between a written portion and an unwritten portion of an open block may include performing a word line by word line binary search of a first physical area of the open block to identify a last written word line of the first physical area of the block, and subsequently, searching in at least a second physical area of the open block based on the last written word line of the first physical area of the block as identified by the binary search.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: June 7, 2016
    Assignee: SanDisk Technologies Inc.
    Inventors: Yew Yin Ng, Gautam Dusija, Dennis S. Ea, Mrinal Kochar
  • Patent number: 9229644
    Abstract: In a nonvolatile memory array that has a binary cache formed of SLC blocks and a main memory formed of MLC blocks, corrupted data along an MLC word line is corrected and relocated, along with any other data along the MLC word line, to binary cache, before it becomes uncorrectable. Subsequent reads of the relocated data directed to binary cache.
    Type: Grant
    Filed: November 25, 2013
    Date of Patent: January 5, 2016
    Assignee: SanDisk Technologies Inc.
    Inventors: Yew Yin Ng, Mrinal Kochar, Niles Yang, Deepanshu Dutta
  • Publication number: 20150149693
    Abstract: In a nonvolatile memory array that has a binary cache formed of SLC blocks and a main memory formed of MLC blocks, corrupted data along an MLC word line is corrected and relocated, along with any other data along the MLC word line, to binary cache, before it becomes uncorrectable. Subsequent reads of the relocated data directed to binary cache.
    Type: Application
    Filed: November 25, 2013
    Publication date: May 28, 2015
    Applicant: SanDisk Technologies Inc.
    Inventors: Yew Yin Ng, Mrinal Kochar, Niles Yang, Deepanshu Dutta