Abstract: A gate driver and a display device including the same are disclosed. The gate driver includes a plurality of stages. Each stage includes a first transistor outputting a first clock signal as a scan signal in accordance with a first node, a second transistor outputting a gate-off voltage as the scan signal in accordance with a second node which is activated as opposed to the first node, a first controller activating the first node to a gate-on voltage in response to a start signal or a carry signal and a fourth clock signal, and a second controller activating the second node to the gate-on voltage in response to a second clock signal and a third clock signal.

Abstract: A gate driver and a display device including the same are disclosed. The gate driver includes a plurality of stages. Each stage includes a first transistor outputting a first clock signal as a scan signal in accordance with a first node, a second transistor outputting a gate-off voltage as the scan signal in accordance with a second node which is activated as opposed to the first node, a first controller activating the first node to a gate-on voltage in response to a start signal or a carry signal and a fourth clock signal, and a second controller activating the second node to the gate-on voltage in response to a second clock signal and a third clock signal.