Patents by Inventor YI-AN WU

YI-AN WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11984324
    Abstract: In a method of manufacturing a semiconductor device, a sacrificial gate structure is formed over a substrate. The sacrificial gate structure includes a sacrificial gate electrode. A first dielectric layer is formed over the sacrificial gate structure. A second dielectric layer is formed over the first dielectric layer. The second and first dielectric layers are planarized and recessed, and an upper portion of the sacrificial gate structure is exposed while a lower portion of the sacrificial gate structure is embedded in the first dielectric layer. A third dielectric layer is formed over the exposed sacrificial gate structure and over the first dielectric layer. A fourth dielectric layer is formed over the third dielectric layer. The fourth and third dielectric layers are planarized, and the sacrificial gate electrode is exposed and part of the third dielectric layer remains on the recessed first dielectric layer. The sacrificial gate electrode is removed.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Chen Wei, Feng-Inn Wu, Tzi-Yi Shieh
  • Patent number: 11984661
    Abstract: An electronic device may include first and second phased antenna arrays and a triplet of first, second, and third ultra-wideband antennas. An antenna module in the device may include a dielectric substrate. The first and second arrays and the triplet may be formed on the dielectric substrate. The third and second ultra-wideband antennas may be separated by a gap. The first array may be laterally interposed between the third and second ultra-wideband antennas within the gap. The third ultra-wideband antenna may be laterally interposed between the first phased antenna array and at least some of the second array. An integrated circuit may be mounted to the dielectric substrate using an interposer. The antenna module may occupy a minimal amount of space within the device and may be less expensive to manufacture relative to scenarios where the arrays and the ultra-wideband antennas are formed on separate substrates.
    Type: Grant
    Filed: September 21, 2020
    Date of Patent: May 14, 2024
    Assignee: Apple Inc.
    Inventors: Yi Jiang, Jiangfeng Wu, Siwen Yong, Hao Xu, Ana Papio Toda, Carlo di Nallo, Michael D. Quinones, Mattia Pascolini, Amin Tayebi, Aaron J. Cooper, Per Jakob Helander, Johan Avendal
  • Patent number: 11984375
    Abstract: In an embodiment, a device includes: a first integrated circuit die having a first contact region and a first non-contact region; an encapsulant contacting sides of the first integrated circuit die; a dielectric layer contacting the encapsulant and the first integrated circuit die, the dielectric layer having a first portion over the first contact region, a second portion over the first non-contact region, and a third portion over a portion of the encapsulant; and a metallization pattern including: a first conductive via extending through the first portion of the dielectric layer to contact the first integrated circuit die; and a conductive line extending along the second portion and third portion of the dielectric layer, the conductive line having a straight portion along the second portion of the dielectric layer and a first meandering portion along the third portion of the dielectric layer.
    Type: Grant
    Filed: April 18, 2023
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Hsun Chen, Yu-Ling Tsai, Jiun Yi Wu, Chien-Hsun Lee, Chung-Shi Liu
  • Patent number: 11984374
    Abstract: A method includes placing a package component over a carrier. The package component includes a device die. A core frame is placed over the carrier. The core frame forms a ring encircling the package component. The method further includes encapsulating the core frame and the package component in an encapsulant, forming redistribution lines over the core frame and the package component, and forming electrical connectors over and electrically coupling to the package component through the redistribution lines.
    Type: Grant
    Filed: February 14, 2022
    Date of Patent: May 14, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Jiun Yi Wu, Chen-Hua Yu, Chung-Shi Liu
  • Publication number: 20240152976
    Abstract: A method includes receiving from a client device a request for content, and transmitting to the client device a first content item, a second content item, and a script for displaying the first and second content items within an information resource. The script includes instructions that cause the client device to (1) display the first content item within a content slot having a first size occupying a first region of the information resource, (2) identify a user interaction associated with the first content item, (3) expand, responsive to the user interaction associated with the first content item, the content slot from a first size to a second size, and (4) display, responsive to the user interaction and in the expanded content slot, the first content item and the second content item and an actionable object configured to reduce the content slot from the second size to the first size.
    Type: Application
    Filed: December 27, 2023
    Publication date: May 9, 2024
    Inventors: Amy Wu, Brandon Murdock Pearcy, Nathan Peter Lucash, Jun Xu, Yi Zhang, Zhen Yu
  • Publication number: 20240151746
    Abstract: The present invention relates to a pogo pin cooling system and a pogo pin cooling method and an electronic device testing apparatus having the system. The system uses a cooling fluid supply module for the cooling of the pogo pin, and the cooling fluid may be either a coolant or a cooling gas. When an electronic device is accommodated in the chip socket, the cooling fluid supply module supplies a cooling fluid into the chip socket through the cooling fluid supply channel and the inlet, and the cooling fluid passes through the pogo pins and then flows into the cooling fluid discharge channel through the outlet. In the present invention, the cooling fluid is mainly used to cool not only the pogo pins in the chip socket but also the bottom surface of the electronic device and the solder ball contacts on the bottom surface.
    Type: Application
    Filed: April 27, 2023
    Publication date: May 9, 2024
    Inventors: I-Shih TSENG, I-Ching TSAI, Xin-Yi WU, Chin-Yi OUYANG
  • Publication number: 20240150832
    Abstract: The present disclosure provides a reagent for detecting an expression level of a human histamine receptor HRH4 mRNA, a kit and a detection method. In the present disclosure, the reagent includes a specific primer and a probe for a human histamine receptor HRH4, the specific primer includes an HRH4-F and an HRH4-R, and the probe includes an H4-Probe; and the HRH4-F has a nucleotide sequence shown in SEQ ID NO. 1, the HRH4-R has a nucleotide sequence shown in SEQ ID NO. 2 and the H4-Probe has a nucleotide sequence shown in SEQ ID NO. 3. In the present disclosure, a kit for one-step detection and a detection method based on the reagent are prepared, and the expression level of the HRH4 mRNA can be one-step quantitatively detected with simple operation and short detection time.
    Type: Application
    Filed: August 4, 2021
    Publication date: May 9, 2024
    Inventors: Shandong WU, Yi LIU, Zhoujie WU, Xuehan JIANG, Xukai YANG, Meijie WANG, Weiyue CAI
  • Patent number: 11976123
    Abstract: Disclosed herein are agnostic anti-CD40 antibodies and methods of using such for eliciting CD40 signaling, thereby enhancing immune responses, such as dendritic cell functions. The antibodies disclosed herein may be used to treat diseases, such as cancer and immune disorders.
    Type: Grant
    Filed: April 19, 2019
    Date of Patent: May 7, 2024
    Assignee: LYVGEN BIOPHARMA HOLDINGS LIMITED
    Inventors: Jieyi Wang, Yi Wu
  • Patent number: 11977713
    Abstract: The present disclosure provides a viewing angle adjustment method and device, an electronic device, and a non-transitory computer-readable storage medium, and belongs to the field of computer technologies. The method includes determining an adsorption area of a first virtual object in a virtual scenario according to a distance between the first virtual object and a second virtual object, a size of the adsorption area being positively correlated with the distance between the first virtual object and a second virtual object. In response to an aiming point of the second virtual object being located in the adsorption area, the method includes obtaining a target rotation speed of a viewing angle of the virtual scenario. The method also includes adjusting the viewing angle of the virtual scenario according to the target rotation speed of the viewing angle.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: May 7, 2024
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Yi Hao, Zhe Zhou, Shuohuan Wu
  • Patent number: 11977756
    Abstract: A computer device, a setting method for a memory module, and a mainboard are provided. The computer device includes a memory module, a processor, and the mainboard. A basic input output system (BIOS) of the mainboard stores a custom extreme memory profile (XMP). When the processor executes the BIOS, so that the computer device displays a user interface (UI), the BIOS displays multiple default XMPs stored in the memory module and the custom XMP through the UI. The BIOS stores one of the default XMPs and the custom XMP to the memory module according to a selecting result of the one of the default XMPs and the custom XMP displayed on the UI.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: May 7, 2024
    Assignee: GIGA-BYTE TECHNOLOGY CO., LTD.
    Inventors: Chia-Chih Chien, Sheng-Liang Kao, Chen-Shun Chen, Chieh-Fu Chung, Hua-Yi Wu
  • Patent number: 11978664
    Abstract: A method includes forming a first conductive feature over a semiconductor substrate, forming an ILD layer over the first conductive feature, patterning the ILD layer to form a trench, and forming a conductive layer over the patterned ILD layer to fill the trench. The method further includes polishing the conductive layer to form a via contact configured to interconnect the first conductive feature with a second conductive feature, where polishing the conductive layer exposes a top surface of the ILD layer, polishing the exposed top surface of the ILD layer, such that a top portion of the via contact protrudes from the exposed top surface of the ILD layer, and forming the second conductive feature over the via contact, such that the top portion of the via contact extends into the second conductive feature.
    Type: Grant
    Filed: July 29, 2022
    Date of Patent: May 7, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Pang-Sheng Chang, Chao-Hsun Wang, Kuo-Yi Chao, Fu-Kai Yang, Mei-Yun Wang, Li-Chieh Wu, Chun-Wei Hsu
  • Patent number: 11980101
    Abstract: Disclosed are a thermoelectric device and a manufacturing mold and manufacturing method thereof. The thermoelectric device includes at least one set of thermoelectric arm unit, wherein a first thermoelectric arm is provided with a first upper surface and a first lower surface opposite to the first upper surface; a second thermoelectric arm is provided with a second upper surface and a second lower surface opposite to the second upper surface; the second thermoelectric arm is seamlessly bonded with the first thermoelectric arm via an insulating adhesive layer; the first upper surface is flush with the second upper surface, and a first spacing groove is formed between adjacent positions of the first upper surface and the second upper surface; the first lower surface is flush with the second lower surface, and a second spacing groove is formed between adjacent positions of the first lower surface and the second lower surface.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: May 7, 2024
    Assignee: XI'AN JIAOTONG UNIVERSITY
    Inventors: Hailong He, Chunping Niu, Hongrui Ren, Yi Wu, Mingzhe Rong
  • Patent number: 11978410
    Abstract: A method of backlight control for a display panel is provided. The display panel is configured to display with a variable refresh rate in a plurality of frame periods each having a fixed period and a variable period. The method includes steps of: generating a first backlight control signal in the fixed period of a frame period; determining whether a liquid crystal (LC) transition time corresponding to the frame period ends before an end time of the variable period of the frame period; generating a second backlight control signal in the variable period of the frame period when the LC transition time ends before the end time of the variable period of the frame period; and generating a compensation backlight control signal in a next frame period according to a backlight duty cycle of the frame period.
    Type: Grant
    Filed: June 23, 2022
    Date of Patent: May 7, 2024
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Po-Hsiang Huang, Chung-Wen Wu, Jiun-Yi Lin, Wen-Chi Lin
  • Publication number: 20240141716
    Abstract: The door sill includes a sill deck and a rail carrier assembly having a function of height adjustment. The rail carrier assembly is configured on the sill deck. The rail carrier assembly includes a rail cap, a rail carrier, an adjustment nut and an adjustment screw. The rail cap is snapped onto an upper end of the rail carrier. A groove is formed in the sill deck for the rail carrier to fit in. A nut installation hole is formed in the rail carrier. The adjustment nut is assembled at the nut installation hole, and is in threaded fit with the adjustment screw. The adjustment screw drives the adjustment nut to move up or down in an axial direction of the adjustment screw through rotation, thereby altering the height of the rail carrier fitted in the groove and altering the height of the rail cap.
    Type: Application
    Filed: December 26, 2022
    Publication date: May 2, 2024
    Inventors: Minghui CHEN, Yi CAO, James William Meeks, Xuhui WU
  • Publication number: 20240144373
    Abstract: In various examples, interactive systems that use neural networks to determine financial investment predictions or recommendations are presented. Systems and methods are disclosed that determine financial predictions or recommendations associated with one or more investments using a neural network(s). The financial predictions may include a predicted movement of an investment (e.g., extremely down, down, preserved, up, extremely up, etc.), a predicted price of an investment (e.g., a future stock price, etc.), a specific investment for a user to buy/sell/trade, and/or so forth. In some examples, the systems and methods may include an interactive system(s), such as a dialogue system(s), that interacts with users to provide the financial predictions.
    Type: Application
    Filed: October 31, 2022
    Publication date: May 2, 2024
    Inventors: Xianchao Wu, Yi Dong, Scott Nunweiler
  • Publication number: 20240142492
    Abstract: The present invention relates to a pogo pin cooling system and a pogo pin cooling method and an electronic device testing apparatus having the system. The system mainly comprises a coolant circulation module, which includes a coolant supply channel communicated with an inlet of a chip socket and a coolant recovery channel communicated with an outlet of the chip socket. When an electronic device is accommodated in the chip socket, the coolant circulation module supplies a coolant into the chip socket through the coolant supply channel and the inlet, and the coolant passes through the pogo pins and then flows into the coolant recovery channel through the outlet.
    Type: Application
    Filed: October 28, 2022
    Publication date: May 2, 2024
    Inventors: I-Shih TSENG, Xin-Yi WU, I-Ching TSAI, Chin-Yi OUYANG
  • Publication number: 20240144372
    Abstract: In various examples, interactive systems that use neural networks to determine financial investment predictions or recommendations are presented. Systems and methods are disclosed that determine financial predictions or recommendations associated with one or more investments using a neural network(s). The financial predictions may include a predicted movement of an investment (e.g., extremely down, down, preserved, up, extremely up, etc.), a predicted price of an investment (e.g., a future stock price, etc.), a specific investment for a user to buy/sell/trade, and/or so forth. In some examples, the systems and methods may include an interactive system(s), such as a dialogue system(s), that interacts with users to provide the financial predictions.
    Type: Application
    Filed: October 31, 2022
    Publication date: May 2, 2024
    Inventors: Xianchao Wu, Yi Dong, Scott Nunweiler
  • Publication number: 20240144467
    Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
  • Patent number: D1026190
    Type: Grant
    Filed: December 26, 2022
    Date of Patent: May 7, 2024
    Inventors: Zhaoyang Wu, Huanlong Wu, Linjun Yu, Weirui Liu, Luyao Han, Yi Liu
  • Patent number: D1026191
    Type: Grant
    Filed: December 26, 2022
    Date of Patent: May 7, 2024
    Inventors: Luyao Han, Yi Liu, Ziqing Ruan, Yanda Li, Huanlong Wu, Linjun Yu