Abstract: A duty cycle correction method converts a pair of differential analog signals from an oscillator into an output pulse signal with 50% of duty cycle. The pulse signal has the same frequency as that of each of the differential analog signals. The duty cycle correction method processes the pair of differential analog signals into a first digital pulse signal and a second digital pulse signal, wherein the first digital pulse signal and the second digital pulse signal have a specified phase difference therebetween, frequency-divides the first digital pulse signal and the second digital pulse signal into a third digital pulse signal and a fourth digital pulse signal, and generates the output pulse signal according to the third and fourth digital pulse signals. The output pulse signal can be generated by performing an exclusive OR operation of the third and fourth digital pulse signals.

Abstract: A duty cycle correction circuit is provided for converting a pair of differential analog signals from an oscillator into an output pulse signal with 50% of duty cycle. The pulse signal has the same frequency as that of each of the differential analog signals. The duty cycle correction circuit includes a first differential-to-single-ended buffer circuit, a second differential-to-single-ended buffer circuit, a first frequency divider, a second frequency divider and a symmetrical exclusive OR element. The first and the second differential-to-single-ended buffer circuits are used for processing the pair of differential analog signals into a first and a second digital pulse signals, respectively. The first and the second frequency dividers are employed for frequency-dividing the first and the digital pulse signal into a third and a fourth digital pulse signal, respectively. The symmetrical exclusive OR element is used for performing an exclusive OR operation so as to produce the output pulse signal.

Abstract: A duty cycle correction circuit is provided for converting a pair of differential analog signals from an oscillator into an output pulse signal with 50% of duty cycle. The pulse signal has the same frequency as that of each of the differential analog signals. The duty cycle correction circuit includes a first differential-to-single-ended buffer circuit, a second differential-to-single-ended buffer circuit, a first frequency divider, a second frequency divider and a symmetrical exclusive OR element. The first and the second differential-to-single-ended buffer circuits are used for processing the pair of differential analog signals into a first and a second digital pulse signals, respectively. The first and the second frequency dividers are employed for frequency-dividing the first and the digital pulse signal into a third and a fourth digital pulse signal, respectively. The symmetrical exclusive OR element is used for performing an exclusive OR operation so as to produce the output pulse signal.

Abstract: A signal processing circuit and related method for adjusting an input signal and generating a corresponding output signal in an optical disk driver. The signal processing circuit includes an attenuator, an amplifier, a controller, and a waveform adjuster. The attenuator reduces the input signal and generates a first temporary output signal. The amplifier enlarges the input signal and generates a second temporary output signal. The controller selectively enables one of the amplifier or the attenuator according to the first and second temporary signals. The waveform adjuster receives the temporary output signals and generates the output signals.

Abstract: The present invention provides a data recovery circuit for generating an output signal that is synchronized with an input signal. The data recovery circuit includes a charge pump, a first filter, an oscillator, a switch circuit, and a second filter. When the charge pump operates, the switch circuit will disconnect the first filter from the oscillator. Additionally, when the charge pump stops operating, the switch circuit will connect the first filter and the oscillator such that the oscillator adjusts a frequency or phase of the output signal according to the output voltage of the first filter.