Abstract: The present application discloses a semiconductor device. The semiconductor device includes a memory stacking pair. The memory stacking pair includes a first memory semiconductor structure and a second memory semiconductor structure. The first memory semiconductor structure has a first front side and a first back side opposite to the first front side. The second memory semiconductor structure has a second front side and a second back side opposite to the second front side. The first memory semiconductor structure is bonded to the second memory semiconductor structure, and the first front side of the first memory semiconductor structure is proximal to the second front side of the second memory semiconductor structure, and the first back side is distal to the second back side.

Abstract: A package substrate includes a first dielectric layer, a second dielectric layer and a core layer. The first dielectric layer includes first electrical interconnect. The second dielectric layer includes second electrical interconnect. The core layer is situated between the first dielectric layer and the second dielectric layer, and includes a plurality of semiconductor dies stacked one above another between the first dielectric layer and the second dielectric layer. A first semiconductor die of the semiconductor dies is a capacitor die electrically connected to the first electrical interconnect of the first dielectric layer.

Abstract: A stitching method for an exposure process includes following steps. A wafer is provided. The wafer includes interposer regions, each of which includes a logic chip region, a first memory chip region, and a second memory chip region. The logic chip region is located between the first and second memory chip regions. A photoresist layer is formed on the wafer. First exposure processes are performed on the photoresist layer by applying a first photomask to form first shot regions in the photoresist layer. Second exposure processes are performed on the photoresist layer by applying a second photomask to form second shot regions in the photoresist layer. The first shot regions and the second shot regions are arranged alternately in a first direction. The first shot regions and the second shot regions are overlapped to form stitching regions, each of which is not located in the logic chip region.

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first semiconductor structure, a dielectric bonding structure, a second semiconductor structure, and a through via structure. The first semiconductor structure includes a first substrate and a first back-end-of-line (BEOL) structure over the first substrate. The dielectric bonding structure is over the first semiconductor structure. The second semiconductor structure is over the dielectric bonding structure. The second semiconductor structure includes a second BEOL structure over the dielectric bonding structure and a second substrate over the second BEOL structure. The through via structure penetrates the second semiconductor structure and the dielectric bonding structure to connect the first BEOL structure and the second BEOL structure. A method for forming a semiconductor package structure is also provided.

Abstract: The embodiments provide a backplane and a power conversion method and apparatus. The power conversion apparatus includes a first power module, a second power module, and a controller. Each power module includes a signal processor and a corresponding power converter. The signal processor in the first power module sends a generated first carrier signal to the signal processor in the second power module. The signal processor in the second power module determines a second carrier signal by using a period of the first carrier signal, to drive the power converter in the first power module by using the first carrier signal, and drive the power converter in the second power module by using the second carrier signal. This improves operating efficiency of a device in a power conversion process and reduces a power loss.

Abstract: An energy storage device may include a housing and an electrolyte-impermeable-barrier-member disposed within an internal space of the housing. The electrolyte-impermeable-barrier-member may partition the internal space of the housing into a receptacle space and an intervening space. The energy storage device may further include a first electrode disposed in the intervening space and a second electrode disposed in the receptacle space. The electrolyte-impermeable-barrier-member may define at least one through-hole serving as a channel connecting the receptacle space and the intervening space.

Abstract: A battery management system includes a sampling control unit, a DC/DC conversion unit, and an energy storage unit. When the battery pack needs to be heated, based on battery parameters of the battery pack and a voltage and a current limit value of the DC/DC conversion unit, the sampling control unit may control, in each of at least one consecutive first cycle, the battery pack to discharge to the energy storage unit by using the DC/DC conversion unit; control, in each of at least one consecutive second cycle, the energy storage unit to charge the battery pack by using the DC/DC conversion unit; and control, in the at least one consecutive first cycle and the at least one consecutive second cycle, an average charge/discharge current value of the battery pack to be less than or equal to a charge/discharge current limit value.

Abstract: A power conversion device includes a power conversion device includes an auxiliary power supply, a first load, a power conversion circuit, and a controller. When an output voltage of the auxiliary power supply in operation is greater than or equal to a first voltage threshold, the controller controls the first load to be connected to the power conversion device, so that the output voltage of the auxiliary power supply decreases. When the output voltage of the auxiliary power supply is greater than or equal to a second voltage threshold after the first load is connected to the power conversion device, the controller controls the first load to be disconnected from the power conversion device, and controls the output voltage of the auxiliary power supply to be a first target output voltage. The first voltage threshold is less than the second voltage threshold.

Abstract: A resonant converter, a control method of a resonant converter, and a related device. The resonant converter includes a control circuit, a drive circuit, and a switch circuit. The control circuit is configured to generate, based on a target output electrical parameter of the resonant converter, a first pulse signal and a second pulse signal that have different frequencies. The control circuit is further configured to: obtain a first drive signal based on the first pulse signal and the second pulse signal and send the first drive signal to the drive circuit. The drive circuit is configured to: convert the first drive signal into one or more second drive signals and send the one or more second drive signals to the switch circuit, to turn on or off a switch component in the switch circuit.

Abstract: An insulated metal substrate (IMS) and a method for manufacturing the same are disclosed. The IMS includes an electrically conductive line pattern layer, an encapsulation layer, a first adhesive layer, a second adhesive layer, and a heat sink element. The encapsulation layer fills a gap between a plurality of electrically conductive lines of the electrically conductive line pattern layer. An upper surface of the encapsulation layer is flush with an upper surface of the electrically conductive line pattern layer. The first and second adhesive layer are disposed between the electrically conductive line pattern layer and the heat sink element. A bonding strength between the first adhesive layer and the second adhesive layer is greater than 80 kg/cm2.

Abstract: A casing assembly includes a carrier casing and an operation mechanism, the carrier casing includes a plate portion and a mount portion which is located on the plate portion, the mount portion includes a first mount portion and a second mount portion connected to each other, the first mount portion has a first internal diameter, the second mount portion has a second internal diameter, the first internal diameter is greater than the second internal diameter, the operation mechanism includes an elastic arm portion and a blocking portion, the elastic arm portion is movably disposed on the plate portion, and the blocking portion is located on a side of the elastic arm portion and selectively movable close to or away from the second mount portion.

Abstract: A resonant converter, a control method of a resonant converter, and a related device. The resonant converter includes a control circuit, a drive circuit, and a switch circuit. The control circuit is configured to generate, based on a target output electrical parameter of the resonant converter, a first pulse signal and a second pulse signal that have different frequencies. The control circuit is further configured to: obtain a first drive signal based on the first pulse signal and the second pulse signal and send the first drive signal to the drive circuit. The drive circuit is configured to: convert the first drive signal into one or more second drive signals and send the one or more second drive signals to the switch circuit, to turn on or off a switch component in the switch circuit.

Abstract: A semiconductor package structure is provided. The semiconductor package structure includes a first redistribution structure, a SoC structure, a memory structure, a first electronic component, and a first encapsulation layer. The first redistribution structure has a first side and a second side opposite to the first side. The SoC structure is on the first side of the first redistribution structure. The memory structure is adjacent to the SoC structure and on the first side of the first redistribution structure. The first electronic component is on the second side of the first redistribution structure and electrically connected to at least one of the SoC structure or the memory structure. The first encapsulation layer encapsulates the first electronic component. The first electronic component includes a semiconductor capacitor structure or a voltage converter.

Abstract: A biometric processing system for authentication combines multiple biometric signals using machine learning to map the different signals into a common argument space that may be processed by a similar fuzzy extractor. The different biometric signals may be given weight values related to their entropy allowing them to be blended to increase security and availability while minimizing intrusiveness.

Abstract: Provided herein are desodiated, pre-aged sodium nickelates, which have been desodiated via acid leaching, and pre-aged using a hydroxide solution. The desodiated, pre-aged sodium nickelates exhibit improved stability. Mixtures of such nickelates with EMD, and methods of making such sodium nickelates, along with alkaline electrochemical cells comprising such are also provided herein.

Abstract: A valve assembly (10) configured to maintain fluid flow therethrough at a constant flow rate. The valve assembly (10) including a flexible flow control member (50) defining an inner fluid chamber (90) within the flexible flow control member (50) and an inlet opening (56) to the inner fluid chamber (90). An outer fluid chamber (92) is defined between the flexible flow control member (50) and an inner surface (74) of a valve housing (20). The flexible flow control member (50) is configured to flex inward and shrink the inner fluid chamber (90) in response to a pressure decrease in the inner fluid chamber (90) relative to the outer fluid chamber (92) resulting from an increase in an inlet flow rate to maintain an outlet flow rate from the valve assembly (10) at the constant flow rate.

Abstract: A system and method for battery charge/discharge equalization, the method including performing, for each battery module of M battery modules of a battery component, determining, by a control unit of the respective battery module, a reference value of a power parameter, wherein M is a positive integer greater than 1, where each battery module of the M battery modules includes the control unit, a direct current-direct current (DCDC) converter, and an energy storage unit, wherein the control unit is electrically connected to the DCDC converter, and the DCDC converter of each battery module is electrically connected to a load or a power supply, and where the reference value is associated with equalizing charging/discharging of the M battery modules, and controlling, by the control unit of the battery module using the DCDC converter, an value of the power parameter to be equal to the reference value.

Abstract: A malto-dextrin composition with low DE value and low viscosity and the method for making the same is provided. The malto-dextrin comprises a blue value in the range of 0.02 to 0.28; a dextrose equivalent (DE) in the range of 3 to 10; and a viscosity lower than 26.3185*DE{circumflex over (?)}(?0.7593). The method for preparing the malto-dextrin composition comprises: dispersing raw starch in water to obtain a starch-water slurry; preheating the starch-water slurry with a jet-cooker for a first duration at a first temperature above 100° C. having a temperature variation no more than 0.8° C.; hydrolyzing the slurry by treating the slurry with ?-amylases for a second duration at a second temperature; and filtering the hydrolyzed slurry to remove insoluble residual proteins and fibers and obtain an un-fractionated malto-dextrin composition.

Abstract: A fusion protein, an amino acid sequence thereof, a coding nucleotide sequence thereof, a preparation method thereof and a use thereof are in the technical field of agricultural biotechnology. The fusion protein contains or consists of at least three, four, five, six, seven, or eight same and/or different PAMP (Pathogen-Associated Molecular Pattern) polypeptides. Optionally, there is at least one linker or no linker between two adjacent PAMP polypeptides. A plurality of PAMP polypeptides are assembled into the fusion protein having multiple immune epitopes. The fusion protein may induce defense immune responses of plants, weaken infestation ability of pathogenic microorganisms and substantially improve the disease resistance of plants. The method for preparing the fusion protein combines technologies of PTI (PAMP-Triggered Immunity) mechanism and gene engineering to obtain the fusion protein having multiple immune epitopes can be used in preparation of plant immune PAMP polypeptides.

Abstract: A malto-dextrin composition with low DE value and low viscosity and the method for making the same is provided. The malto-dextrin comprises a blue value in the range of 0.02 to 0.28; a dextrose equivalent (DE) in the range of 3 to 10; and a viscosity lower than 26.3185*DE{circumflex over (?)}(?0.7593). The method for preparing the malto-dextrin composition comprises: dispersing raw starch in water to obtain a starch-water slurry; preheating the starch-water slurry with a jet-cooker for a first duration at a first temperature above 100° C. having a temperature variation no more than 0.8° C.; hydrolyzing the slurry by treating the slurry with ?-amylases for a second duration at a second temperature; and filtering the hydrolyzed slurry to remove insoluble residual proteins and fibers and obtain an un-fractionated malto-dextrin composition.