Abstract: A semiconductor die package includes an inductor-capacitor (LC) semiconductor die that is directly bonded with a logic semiconductor die. The LC semiconductor die includes inductors and capacitors that are integrated into a single die. The inductors and capacitors of the LC semiconductor die may be electrically connected with transistors and other logic components on the logic semiconductor die to form a voltage regulator circuit of the semiconductor die package. The integration of passive components (e.g., the inductors and capacitors) of the voltage regulator circuit into a single semiconductor die reduces signal propagation distances in the voltage regulator circuit, which may increase the operating efficiency of the voltage regulator circuit, may reduce the formfactor for the semiconductor die package, may reduce parasitic capacitance and/or may reduce parasitic inductance in the voltage regulator circuit (thereby improving the performance of the voltage regulator circuit), among other examples.

Abstract: An optical transceiver module temperature control device includes a processor, a printed circuit board assembly, an optical transceiver module and a temperature adjustment element. The processor is configured to measure an ambient temperature. The printed circuit board assembly includes a first side and a second side. The first side is opposite to the second side. The optical transceiver module is disposed on the first side of the printed circuit board assembly. The temperature adjustment element is coupled to the processor and disposed on the second side of the printed circuit board assembly. The processor is configured to generate a temperature adjustment signal according to the ambient temperature and an operating temperature range. The temperature adjustment element is configured to perform heat exchange with the printed circuit board assembly according to the temperature adjustment signal to adjust a temperature of the optical transceiver module into the operating temperature range.

Abstract: A waterproof click pad device includes a click pad, a frame and a waterproof unit. The frame surrounds the click pad and surrounds an axis passing through the click pad. The waterproof unit is transverse to the axis and is in sheet form. The waterproof unit includes a frame adhesive member surrounding the axis and adhered to the frame, a first non-adhesive member surrounding the axis, connected to an inner periphery of the frame adhesive member and spaced apart from and located above the frame, a second non-adhesive member surrounding the axis, connected to an inner periphery of the first non-adhesive member and spaced apart from and located above the click pad and the frame, and an plate adhesive member connected to an inner periphery of the second non-adhesive member and adhered to the click pad.

Abstract: A semiconductor structure and a method of fabricating therefor are disclosed. A second contact pad (500) is arranged lateral to a first contact pad (420) in an interconnect structure (400). As a result, during fabrication of the interconnect structure (400), the first contact pad (420) will not be present alone in a large bland area, due to the presence of the second contact pad (500). Thus, a pattern feature for the first contact pad (420) will not be over-resolved, increasing formation accuracy of the first contact pad (420) and thus guaranteeing good electrical transmission performance of the resulting interconnect structure (400).

Abstract: A sweep voltage generator and a display panel are provided. The sweep voltage generator includes an output node, a current generating block and a voltage regulating block. The output node is used to provide a sweep signal. The current generating block is coupled to the output node, includes a detection path for detecting an output load variation on the output node, and adjusts the sweep signal provided by the output node based on the output load variation. The voltage regulating block is coupled to the output node for regulating a voltage of the output node.

Abstract: A magnetic multi-pole propulsion array system is applied to at least one external cathode and includes a plurality of magnetic multi-pole thrusters connected adjacent to each other. Each magnetic multi-pole thruster includes a propellant provider, a discharge chamber, an anode and a plurality of magnetic components. The propellant provider outputs propellant. The discharge chamber is connected with the propellant provider to accommodate the propellant. The anode is disposed inside the discharge chamber to generate an electric field. The plurality of magnetic components is respectively disposed on several sides of the discharge chamber. One of the several sides of the discharge chamber of the magnetic multi-pole thruster is applied for one side of a discharge chamber of another magnetic multi-pole thruster.

Abstract: A semiconductor device includes a first transistor and a protection structure. The first transistor includes a gate electrode, a gate dielectric disposed on the gate electrode, and a channel layer disposed on the gate dielectric. The protection structure is laterally surrounding the gate electrode, the gate dielectric and the channel layer of the first transistor. The protection structure includes a first capping layer and a dielectric portion. The first capping layer is laterally surrounding and contacting the gate electrode, the gate dielectric and the channel layer of the first transistor. The dielectric portion is disposed on the first capping layer and laterally surrounding the first transistor.

Abstract: A substrate processing apparatus comprises a chamber member that defines an interior volume that has an aspect ratio. The chamber member comprises a pair of laterally opposing inlet walls and a loading port. Each of the pair of laterally opposing inlet walls has an inlet port configured to receive output from a remote plasma source. The loading port is arranged between the pair of inlet walls, configured to allow passage of a substrate into the interior volume.

Abstract: The present disclosure provides a method for treating liver cirrhosis by using a composition including mesenchymal stem cells, extracellular vesicles produced by the mesenchymal stem cells, and growth factors. The composition of the present disclosure achieves the effect of treating liver cirrhosis through various efficacy experiments.

Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.

Abstract: One or more embodiments described herein relate to selective methods for fabricating devices and structures. In these embodiments, the devices are exposed inside the process volume of a process chamber. Precursor gases are flowed in the process volume at certain flow ratios and at certain process conditions. The process conditions described herein result in selective epitaxial layer growth on the {100} planes of the crystal planes of the devices, which corresponds to the top of each of the fins. Additionally, the process conditions result in selective etching of the {110} plane of the crystal planes, which corresponds to the sidewalls of each of the fins. As such, the methods described herein provide a way to grow or etch epitaxial films at different crystal planes. Furthermore, the methods described herein allow for simultaneous epitaxial film growth and etch to occur on the different crystal planes.

Abstract: An IC structure includes a biologically sensitive field-effect transistor (BioBET) in a semiconductor substrate, and a dielectric layer over a backside surface of the semiconductor substrate. The dielectric layer has a sensing well extending through the dielectric layer to a channel region of the BioFET. The IC structure further includes a biosensing film, a plurality of fluid channel walls, and a first heater. The biosensing film lines the sensing well in the dielectric layer. The fluid channel walls are over the biosensing film and define a fluid containment region over the sensing well of the dielectric layer. The first heater is in the semiconductor substrate. The first heater has at least a portion overlapping with the fluid containment region.

Abstract: A biosensor system includes an array of biosensors with a plurality of electrodes situated proximate the biosensor. A controller is configured to selectively energize the plurality of electrodes to generate a DEP force to selectively position a test sample relative to the array of biosensors.

Abstract: A method for treating wastewater containing ertriazole compounds is provided. Hypochlorous acid (HOCl) having a neutral to slightly acidic pH value is added to the wastewater containing triazole compounds for reaction, thereby effectively reacting more than 90% of triazole compounds.

Abstract: In an embodiment, a circuit includes: an error amplifier; a temperature sensor, wherein the temperature sensor is coupled to the error amplifier; a discrete time controller coupled to the error amplifier, wherein the discrete time controller comprises digital circuitry; a multiple bits quantizer coupled to the discrete time controller, wherein the multiple bits quantizer produces a digital code output; and a heating array coupled to the multiple bits quantizer, wherein the heating array is configured to generate heat based on the digital code output.

Abstract: A semiconductor device according to embodiments of the present disclosure includes a first die including a first bonding layer and a second die including a second hybrid bonding layer. The first bonding layer includes a first dielectric layer and a first metal coil embedded in the first dielectric layer. The second bonding layer includes a second dielectric layer and a second metal coil embedded in the second dielectric layer. The second hybrid bonding layer is bonded to the first hybrid bonding layer such that the first dielectric layer is bonded to the second dielectric layer and the first metal coil is bonded to the second metal coil.

Abstract: A substrate processing apparatus, comprising: a processing chamber having a plasma intake wall configured to receive plasma from a remote plasma source (RPS) and a surrounding wall having an inner surface defining an interior volume for receiving a substrate; and a substrate support having a substrate supporting surface facing the plasma intake wall and elevatably arranged in the interior volume of the processing chamber. The surrounding wall, in a cross-section of the processing chamber, includes: a first segment having a first width associated with a processing region for the substrate support; a second segment having a width greater than the first width that is further away from the plasma intake wall than the first segment.

Abstract: A system and method for maximizing bandwidth in an uplink for a 5G communication system is disclosed. Multiple end devices generate image streams. A gateway is coupled to the end devices. The gateway includes a gateway monitor agent collecting utilization rate data of the gateway and an image inspector collecting inspection data from the received image streams. An edge server is coupled to the gateway. The edge server includes an edge server monitor agent collecting utilization rate data of the edge server. An analytics manager is coupled to the gateway and the edge server. The analytics manager is configured to determine an allocation strategy based on the collected utilization rate data from the gateway and the edge server.

Abstract: Disclosed is a voice activity detection (VAD) device and method capable of referring to an environment detection result and thereby selecting one of multiple VAD results as a basis for determining whether a voice activity occurs. The VAD device includes an environment detection circuit, a VAD circuit, and a voice activity decision circuit. The environment detection circuit is configured to process an audio input signal and thereby generate an environment detection result. The VAD circuit is configured to analyze the audio input signal with multiple VAD algorithms and thereby generate multiple VAD results. The voice activity decision circuit is configured to select one of the multiple VAD results according to the environment detection result.

Abstract: A method for performing beamforming sounding feedback in a system-parameter-aware manner and associated apparatus are provided. The method applicable to a wireless transceiver device within a wireless communications system may include: checking a plurality of system parameters of the wireless communications system to generate a plurality of checking results of the plurality of system parameters, respectively, wherein any checking result among the plurality of checking results indicates a current value of a corresponding system parameter among the plurality of system parameters; modifying a first beamforming feedback matrix according to the plurality of checking results to generate a second beamforming feedback matrix; and sending beamforming sounding feedback information carrying the second beamforming feedback matrix to another device within the wireless communications system, for further processing of the other device.