Patents by Inventor Yi-Chi Chen

Yi-Chi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11969447
    Abstract: A composition for promoting defecation includes a cell culture of at least one lactic acid bacterial strain which is substantially free of cells. The least one lactic acid bacterial strain is selected from the group consisting of Lactobacillus salivarius subsp. salicinius AP-32, Bifidobacterium animalis subsp. lactis CP-9, and Lactobacillus acidophilus TYCA06, which are respectively deposited at the Bioresource Collection and Research Center (BCRC) under accession numbers BCRC 910437, BCRC 910645 and BCRC 910813. Also disclosed is a method for promoting defecation, including administering to a subject in need thereof an effective amount of the composition.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: April 30, 2024
    Assignee: GLAC BIOTECH CO., LTD.
    Inventors: Hsieh-Hsun Ho, Ching-Wei Chen, Yi-Wei Kuo, Yu-Fen Huang, Cheng-Chi Lin
  • Patent number: 11942750
    Abstract: A laser inspection system is provided. A laser source emits a laser with a first spectrum and the laser is transmitted by a first optical fiber. A gain optical fiber doped with special ions is connected to the first optical fiber, and a light detector is provided around the gain optical fiber. When the laser with the first spectrum passes through the gain optical fiber, the gain optical fiber absorbs part of the energy level of the laser with the first spectrum, so that the laser with the first spectrum is converted to generate light with a second spectrum based on the frequency conversion phenomenon. The light detector detects the intensity of the light with the second spectrum, so that the power of the laser source can be obtained.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Chi Lee, Hsin-Chia Su, Shih-Ting Lin, Yu-Cheng Song, Fu-Shun Ho, Chih-Chun Chen
  • Patent number: 11942420
    Abstract: A semiconductor device includes a first gate structure extending along a first lateral direction. The semiconductor device includes a first interconnect structure, disposed above the first gate structure, that extends along a second lateral direction perpendicular to the first lateral direction. The first interconnect structure includes a first portion and a second portion electrically isolated from each other by a first dielectric structure. The semiconductor device includes a second interconnect structure, disposed between the first gate structure and the first interconnect structure, that electrically couples the first gate structure to the first portion of the first interconnect structure. The second interconnect structure includes a recessed portion that is substantially aligned with the first gate structure and the dielectric structure along a vertical direction.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guo-Huei Wu, Hui-Zhong Zhuang, Chih-Liang Chen, Cheng-Chi Chuang, Shang-Wen Chang, Yi-Hsun Chiu
  • Publication number: 20240086633
    Abstract: A method for generating and outputting a message is implemented using an electronic device the stores a computer program product and a text database. The text database includes a main message template, a template text that includes a placeholder, and a word group that includes a plurality of preset words for replacing the placeholder. The method includes: in response to receipt of a command for execution of the computer program product, displaying an editing interface including the main message template; in response to receipt of user operation of a selection of the main message template, displaying the template text; in response to receipt of user operation of a selection of one of the preset words via the user interface, generating an edited text by replacing the placeholder with the one of the preset words in the template text; and outputting the edited text as a message.
    Type: Application
    Filed: April 25, 2023
    Publication date: March 14, 2024
    Inventors: Yi-Ru CHIU, Ting-Yi LI, Hong-Xun WANG, Jin-Lin CHEN, Chih-Hsuan YEH, Chia-Chi YIN, Wei-Ting LI, Po-Lun CHANG
  • Publication number: 20240077593
    Abstract: An optical radar includes an optical-signal receiving unit and an optical-signal pickup unit. The optical-signal receiving unit is configured to receive a reflected light. The optical-signal pickup unit is coupled to the optical-signal receiving unit and includes a first optical-signal filtering circuit and a second optical-signal filtering unit. The first optical-signal filtering circuit is configured to filter out a first interference pulse of the reflected light, wherein the first interference pulse has a first interference voltage value higher than a reference voltage. The second optical-signal filtering circuit is coupled to the first optical-signal filtering circuit and configured to generate a clock signal comprising a clock pulse; and filter out a second interference pulse that does not match the clock pulse in time point from the reflected light.
    Type: Application
    Filed: November 30, 2022
    Publication date: March 7, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Chun CHEN, Yi-Chi LEE, Chia-Yu HU, Ji-Bin HORNG
  • Publication number: 20240072075
    Abstract: An electronic device including a substrate, a first electrode layer, a photodiode, an insulating layer, a second electrode layer, and a first transparent conductive layer is provided. The first electrode layer is disposed on the substrate. The photodiode is disposed on the first electrode layer and is electrically connected to the first electrode layer. The insulating layer is disposed on the photodiode. The second electrode layer is disposed on the insulating layer and is electrically connected to the photodiode. The first transparent conductive layer is disposed on the insulating layer and contacts the second electrode layer. A manufacturing method of an electronic device is also provided.
    Type: Application
    Filed: July 18, 2023
    Publication date: February 29, 2024
    Applicants: InnoCare Optoelectronics Corporation, Innolux Corporation
    Inventors: Chin-Chi Chen, Ting-Yu Chen, Yi-Ju Tseng, Ji-Zhen Lu
  • Publication number: 20240066635
    Abstract: A laser machining device includes a pulsed laser generator, an accommodation chamber, a bandwidth broadening unit and a pulse compression unit. The pulsed laser generator is configured to emit a pulsed laser. The accommodation chamber has a gas inlet. The bandwidth broadening unit is disposed in the accommodation chamber, and is configured to broaden a frequency bandwidth of the pulsed laser to obtain a broad bandwidth pulsed laser. The pulse compression unit is disposed in the accommodation chamber. The bandwidth broadening unit and the pulse compression unit are arranged in order along a laser propagation path, and the pulse compression unit is configured to compress a pulse duration of the broad bandwidth pulsed laser.
    Type: Application
    Filed: October 5, 2022
    Publication date: February 29, 2024
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yi-Chi LEE, Bo-Han CHEN, Chih-Hsuan LU, Ping-Han WU, Zih-Yi LI, Shang-Yu HSU
  • Publication number: 20240073563
    Abstract: The present disclosure provides a time delay integration (TDI) sensor using a rolling shutter. The TDI sensor includes multiple pixel columns. Each pixel column includes multiple pixels arranged in an along-track direction, wherein two adjacent pixels or two adjacent pixel groups in every pixel column have a separation space therebetween. The separation space is equal to a pixel height multiplied by a time ratio of a line time difference of the rolling shutter and a frame period, or equal to a summation of at least one pixel height and a multiplication of the pixel height by the time ratio of the line time difference and the frame period. The TDI sensor further records defect pixels of a pixel array such that in integrating pixel data to integrators, the pixel data associated with the defect pixels is not integrated into corresponding integrators.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Inventors: Ren-Chieh LIU, Chao-Chi LEE, Yi-Yuan CHEN, En-Feng HSU
  • Publication number: 20240069594
    Abstract: A portable electronic device including a first body, a second body, a stand, and a hinge structure is provided. The stand has a first pivot part and a second pivot part opposite to the first pivot part, wherein the first pivot part is pivotally connected to the first body, and the second body is pivotally connected to the second pivot part. The hinge structure includes a first bracket secured to the second body, a second bracket secured to the second pivot part of the stand, a first movable base, a first shaft secured to the first bracket and pivoted to the first movable base, a second movable base, a second shaft secured to the first movable base and pivoted to the second movable base, and a sliding shaft fixed to the second movable base and slidably connected to the second bracket.
    Type: Application
    Filed: November 3, 2023
    Publication date: February 29, 2024
    Applicant: Acer Incorporated
    Inventors: Chia-Bo Chen, Yi-Hsuan Yang, Hung-Chi Chen, Wu-Chen Lee
  • Patent number: 11869828
    Abstract: A semiconductor package includes a first die. The first die includes a semiconductor substrate. The semiconductor substrate has a first surface, a second surface opposite to the first surface, and a through hole between the first surface and the second surface and having an inner wall. The inner wall has a first lever arm. A length of the first lever arm is less than a thickness of the semiconductor substrate.
    Type: Grant
    Filed: June 10, 2021
    Date of Patent: January 9, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yi-Chi Chen, Ming-Han Wang
  • Publication number: 20220399250
    Abstract: A semiconductor package includes a first die. The first die includes a semiconductor substrate. The semiconductor substrate has a first surface, a second surface opposite to the first surface, and a through hole between the first surface and the second surface and having an inner wall. The inner wall has a first lever arm. A length of the first lever arm is less than a thickness of the semiconductor substrate.
    Type: Application
    Filed: June 10, 2021
    Publication date: December 15, 2022
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yi-Chi CHEN, Ming-Han WANG
  • Patent number: 11099674
    Abstract: A pixel array substrate includes a first touch signal line having a first and second portion and a bridge portion, pixel structures including a first and second pixel structure, a first and second data line, a first and second connection pattern, and a touch electrode. The first pixel structure and the second pixel structure are respectively located on a first and second side of the first touch signal line. The first data line and the second data line are respectively located on the second and first sides of the first touch signal line. The first connection pattern is electrically connected to the first data line and the first pixel structure. The second connection pattern is electrically connected to the second data line and the second pixel structure. The bridge portion of the first touch signal line crosses over the first connection pattern and the second connection pattern.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: August 24, 2021
    Assignee: Au Optronics Corporation
    Inventors: Kuan-Yu Chiu, Teng-Fu Tung, Yi-Chi Chen, Ming-Hsuan Lee
  • Publication number: 20210034183
    Abstract: A pixel array substrate includes a first touch signal line having a first and second portion and a bridge portion, pixel structures including a first and second pixel structure, a first and second data line, a first and second connection pattern, and a touch electrode. The first pixel structure and the second pixel structure are respectively located on a first and second side of the first touch signal line. The first data line and the second data line are respectively located on the second and first sides of the first touch signal line. The first connection pattern is electrically connected to the first data line and the first pixel structure. The second connection pattern is electrically connected to the second data line and the second pixel structure. The bridge portion of the first touch signal line crosses over the first connection pattern and the second connection pattern.
    Type: Application
    Filed: January 9, 2020
    Publication date: February 4, 2021
    Applicant: Au Optronics Corporation
    Inventors: Kuan-Yu Chiu, Teng-Fu Tung, Yi-Chi Chen, Ming-Hsuan Lee
  • Patent number: 9557847
    Abstract: A touch panel includes a substrate, a sensing array, a plurality of first connection lines and at least two button sensing pads. The substrate has an active region and a peripheral region disposed on at least one side of the active region. The sensing array is disposed in the active region, which includes a plurality of first sensing electrode series disposed in the active region along a first direction and a plurality of second sensing electrode series disposed in the active region along a second direction. The first and second sensing electrode series intersect and form a plurality of sensing units. The first connection lines are disposed in the peripheral region and electrically connected to the first sensing electrode series respectively. The at least two button sensing pads are disposed in the peripheral region, and electrically connected to at least two first connection lines respectively to form a virtual button.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: January 31, 2017
    Assignee: AU OPTRONICS CORP.
    Inventors: Chien-Yu Chen, Wen-Chi Chuang, Yi-Chi Chen, Ching-Chien Yuan
  • Patent number: 9513670
    Abstract: A touch panel including a substrate, at least one touch-sensing unit, at least one connecting pad, at least a testing line, at least one ESD protection circuit, and a first isolation layer is provided. The touch-sensing unit is disposed on the substrate. The connecting pad is disposed on the substrate and electrically connected to the touch-sensing unit. The testing line is disposed on the substrate, electrically connected to the connecting pad, and extends to at least an edge of the substrate. The ESD protection circuit is disposed in the edge of the substrate and electrically connected to a ground voltage, wherein a vertical projection of the testing line to the substrate and that of the ESD protection circuit to the substrate is at least partially overlapped. The first isolation layer is disposed between the testing line and the ESD protection circuit.
    Type: Grant
    Filed: January 28, 2014
    Date of Patent: December 6, 2016
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Yi-Chi Chen, Chia-Chun Yeh, Chien-Yu Chen, Yi-Ling Lin, Yi-Hsin Lin
  • Patent number: 9229572
    Abstract: A touch device includes a touch panel that includes driving lines, sensing lines, a virtual key, a self-sensing line, and a shielding line. The touch panel has a display region and a non-display region. The driving lines extend along a first direction in the display region and further extend into the non-display region. The sensing lines extend along a second direction in the display region and extend into the non-display region. The first direction is different from the second direction. The virtual key is located in the non-display region and between the driving lines and the sensing lines to shield the driving lines from the sensing lines. Each of the self-sensing line and the shielding line is located in the non-display region, connected to the virtual key, and located between the driving lines and the sensing lines to shield the driving lines from the sensing lines.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: January 5, 2016
    Assignee: Au Optronics Corporation
    Inventors: Chien-Yu Chen, Wen-Chi Chuang, Yi-Chi Chen
  • Publication number: 20150234520
    Abstract: A touch panel includes a substrate, a sensing array, a plurality of first connection lines and at least two button sensing pads. The substrate has an active region and a peripheral region disposed on at least one side of the active region. The sensing array is disposed in the active region, which includes a plurality of first sensing electrode series disposed in the active region along a first direction and a plurality of second sensing electrode series disposed in the active region along a second direction. The first and second sensing electrode series intersect and form a plurality of sensing units. The first connection lines are disposed in the peripheral region and electrically connected to the first sensing electrode series respectively. The at least two button sensing pads are disposed in the peripheral region, and electrically connected to at least two first connection lines respectively to form a virtual button.
    Type: Application
    Filed: April 29, 2014
    Publication date: August 20, 2015
    Applicant: AU Optronics Corp.
    Inventors: Chien-Yu Chen, Wen-Chi Chuang, Yi-Chi Chen, Ching-Chien Yuan
  • Publication number: 20150116259
    Abstract: A touch device includes a touch panel that includes driving lines, sensing lines, a virtual key, a self-sensing line, and a shielding line. The touch panel has a display region and a non-display region. The driving lines extend along a first direction in the display region and further extend into the non-display region. The sensing lines extend along a second direction in the display region and extend into the non-display region. The first direction is different from the second direction. The virtual key is located in the non-display region and between the driving lines and the sensing lines to shield the driving lines from the sensing lines. Each of the self-sensing line and the shielding line is located in the non-display region, connected to the virtual key, and located between the driving lines and the sensing lines to shield the driving lines from the sensing lines.
    Type: Application
    Filed: March 28, 2014
    Publication date: April 30, 2015
    Applicant: Au Optronics Corporation
    Inventors: Chien-Yu Chen, Wen-Chi Chuang, Yi-Chi Chen
  • Publication number: 20140362306
    Abstract: A touch panel including a substrate, at least one touch-sensing unit, at least one connecting pad, at least a testing line, at least one ESD protection circuit, and a first isolation layer is provided. The touch-sensing unit is disposed on the substrate. The connecting pad is disposed on the substrate and electrically connected to the touch-sensing unit. The testing line is disposed on the substrate, electrically connected to the connecting pad, and extends to at least an edge of the substrate. The ESD protection circuit is disposed in the edge of the substrate and electrically connected to a ground voltage, wherein a vertical projection of the testing line to the substrate and that of the ESD protection circuit to the substrate is at least partially overlapped. The first isolation layer is disposed between the testing line and the ESD protection circuit.
    Type: Application
    Filed: January 28, 2014
    Publication date: December 11, 2014
    Applicant: AU Optronics Corporation
    Inventors: Yi-Chi CHEN, Chia-Chun YEH, Chien-Yu CHEN, Yi-Ling LIN, Yi-Hsin LIN
  • Patent number: 8850448
    Abstract: A dynamic reconfigurable heterogeneous processor architecture with load balancing and dynamic allocation method thereof is disclosed. The present invention uses a work control logic unit to detect load imbalance between different types of processors, and employs a number of dynamic reconfigurable heterogeneous processors to offload the heavier loaded processors. Hardware utilization of such design can be enhanced, and variation in computation needs among different computation phases can be better handled. To design the dynamic reconfigurable heterogeneous processors, a method of how to choose the basic building blocks and place the routing components is included. With the present invention, performance can be maximized at a minimal hardware cost. Hence the dynamic reconfigurable heterogeneous processor(s) so constructed and the load balancing and dynamic allocation method together will have the best performance at least cost.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: September 30, 2014
    Assignee: National Chiao Tung University
    Inventors: Chung-Ping Chung, Hui-Chin Yang, Yi-Chi Chen