Abstract: A semiconductor package includes a first die. The first die includes a semiconductor substrate. The semiconductor substrate has a first surface, a second surface opposite to the first surface, and a through hole between the first surface and the second surface and having an inner wall. The inner wall has a first lever arm. A length of the first lever arm is less than a thickness of the semiconductor substrate.

Abstract: A semiconductor package includes a first die. The first die includes a semiconductor substrate. The semiconductor substrate has a first surface, a second surface opposite to the first surface, and a through hole between the first surface and the second surface and having an inner wall. The inner wall has a first lever arm. A length of the first lever arm is less than a thickness of the semiconductor substrate.

Abstract: A pixel array substrate includes a first touch signal line having a first and second portion and a bridge portion, pixel structures including a first and second pixel structure, a first and second data line, a first and second connection pattern, and a touch electrode. The first pixel structure and the second pixel structure are respectively located on a first and second side of the first touch signal line. The first data line and the second data line are respectively located on the second and first sides of the first touch signal line. The first connection pattern is electrically connected to the first data line and the first pixel structure. The second connection pattern is electrically connected to the second data line and the second pixel structure. The bridge portion of the first touch signal line crosses over the first connection pattern and the second connection pattern.

Abstract: A pixel array substrate includes a first touch signal line having a first and second portion and a bridge portion, pixel structures including a first and second pixel structure, a first and second data line, a first and second connection pattern, and a touch electrode. The first pixel structure and the second pixel structure are respectively located on a first and second side of the first touch signal line. The first data line and the second data line are respectively located on the second and first sides of the first touch signal line. The first connection pattern is electrically connected to the first data line and the first pixel structure. The second connection pattern is electrically connected to the second data line and the second pixel structure. The bridge portion of the first touch signal line crosses over the first connection pattern and the second connection pattern.

Abstract: A touch panel includes a substrate, a sensing array, a plurality of first connection lines and at least two button sensing pads. The substrate has an active region and a peripheral region disposed on at least one side of the active region. The sensing array is disposed in the active region, which includes a plurality of first sensing electrode series disposed in the active region along a first direction and a plurality of second sensing electrode series disposed in the active region along a second direction. The first and second sensing electrode series intersect and form a plurality of sensing units. The first connection lines are disposed in the peripheral region and electrically connected to the first sensing electrode series respectively. The at least two button sensing pads are disposed in the peripheral region, and electrically connected to at least two first connection lines respectively to form a virtual button.

Abstract: A touch panel including a substrate, at least one touch-sensing unit, at least one connecting pad, at least a testing line, at least one ESD protection circuit, and a first isolation layer is provided. The touch-sensing unit is disposed on the substrate. The connecting pad is disposed on the substrate and electrically connected to the touch-sensing unit. The testing line is disposed on the substrate, electrically connected to the connecting pad, and extends to at least an edge of the substrate. The ESD protection circuit is disposed in the edge of the substrate and electrically connected to a ground voltage, wherein a vertical projection of the testing line to the substrate and that of the ESD protection circuit to the substrate is at least partially overlapped. The first isolation layer is disposed between the testing line and the ESD protection circuit.

Abstract: A touch device includes a touch panel that includes driving lines, sensing lines, a virtual key, a self-sensing line, and a shielding line. The touch panel has a display region and a non-display region. The driving lines extend along a first direction in the display region and further extend into the non-display region. The sensing lines extend along a second direction in the display region and extend into the non-display region. The first direction is different from the second direction. The virtual key is located in the non-display region and between the driving lines and the sensing lines to shield the driving lines from the sensing lines. Each of the self-sensing line and the shielding line is located in the non-display region, connected to the virtual key, and located between the driving lines and the sensing lines to shield the driving lines from the sensing lines.

Abstract: A touch panel includes a substrate, a sensing array, a plurality of first connection lines and at least two button sensing pads. The substrate has an active region and a peripheral region disposed on at least one side of the active region. The sensing array is disposed in the active region, which includes a plurality of first sensing electrode series disposed in the active region along a first direction and a plurality of second sensing electrode series disposed in the active region along a second direction. The first and second sensing electrode series intersect and form a plurality of sensing units. The first connection lines are disposed in the peripheral region and electrically connected to the first sensing electrode series respectively. The at least two button sensing pads are disposed in the peripheral region, and electrically connected to at least two first connection lines respectively to form a virtual button.

Abstract: A touch device includes a touch panel that includes driving lines, sensing lines, a virtual key, a self-sensing line, and a shielding line. The touch panel has a display region and a non-display region. The driving lines extend along a first direction in the display region and further extend into the non-display region. The sensing lines extend along a second direction in the display region and extend into the non-display region. The first direction is different from the second direction. The virtual key is located in the non-display region and between the driving lines and the sensing lines to shield the driving lines from the sensing lines. Each of the self-sensing line and the shielding line is located in the non-display region, connected to the virtual key, and located between the driving lines and the sensing lines to shield the driving lines from the sensing lines.

Abstract: A touch panel including a substrate, at least one touch-sensing unit, at least one connecting pad, at least a testing line, at least one ESD protection circuit, and a first isolation layer is provided. The touch-sensing unit is disposed on the substrate. The connecting pad is disposed on the substrate and electrically connected to the touch-sensing unit. The testing line is disposed on the substrate, electrically connected to the connecting pad, and extends to at least an edge of the substrate. The ESD protection circuit is disposed in the edge of the substrate and electrically connected to a ground voltage, wherein a vertical projection of the testing line to the substrate and that of the ESD protection circuit to the substrate is at least partially overlapped. The first isolation layer is disposed between the testing line and the ESD protection circuit.

Abstract: A dynamic reconfigurable heterogeneous processor architecture with load balancing and dynamic allocation method thereof is disclosed. The present invention uses a work control logic unit to detect load imbalance between different types of processors, and employs a number of dynamic reconfigurable heterogeneous processors to offload the heavier loaded processors. Hardware utilization of such design can be enhanced, and variation in computation needs among different computation phases can be better handled. To design the dynamic reconfigurable heterogeneous processors, a method of how to choose the basic building blocks and place the routing components is included. With the present invention, performance can be maximized at a minimal hardware cost. Hence the dynamic reconfigurable heterogeneous processor(s) so constructed and the load balancing and dynamic allocation method together will have the best performance at least cost.

Abstract: A dynamic reconfigurable heterogeneous processor architecture with load balancing and dynamic allocation method thereof is disclosed. The present invention uses a work control logic unit to detect load imbalance between different types of processors, and employs a number of dynamic reconfigurable heterogeneous processors to offload the heavier loaded processors. Hardware utilization of such design can be enhanced, and variation in computation needs among different computation phases can be better handled. To design the dynamic reconfigurable heterogeneous processors, a method of how to choose the basic building blocks and place the routing components is included. With the present invention, performance can be maximized at a minimal hardware cost. Hence the dynamic reconfigurable heterogeneous processor(s) so constructed and the load balancing and dynamic allocation method together will have the best performance at least cost.

Abstract: A system for constructing data tag based on a concept relation network is disclosed. A tagging module collects input tags from users to create a tag table accordingly. A count of each tag used is calculated and compared with a predefined threshold value to generate two tag count tables. Relations between each tag and others are calculated. Additionally, an incremental concept is applied to maintain tags in the concept relation network.

Abstract: A dynamic reconfigurable heterogeneous processor architecture with load balancing and dynamic allocation method thereof is disclosed. The present invention uses a work control logic unit to detect load imbalance between different types of processors, and employs a number of dynamically reconfigurable heterogeneous processors to offload the heavier loaded processors. Hardware utilization of such design can be enhanced, and variation in computation needs among different computation phases can be better handled. To design the dynamic reconfigurable heterogeneous processors, a method of how to choose the basic building blocks and place the routing components is included. With the present invention, performance can be maximized at a minimal hardware cost. Hence the dynamic reconfigurable heterogeneous processor(s) so constructed and the load balancing and dynamic allocation method together will have the best performance at least cost.

Abstract: A system for generating a ‘snapshot’ of a learning object is provided. An interface receives a target object and a user identification number. The target object corresponds to a category, comprising a plurality of sentences and multimedia data, wherein the sentences comprise at least one keyword. A learning object database comprises a plurality of learning objects and a user's historical learning record. Each of the learning objects corresponds to at least one category, and comprises at least one keyword. The user's historical learning record comprises a track record of learning objects used corresponding to the user identification number. A script preview unit selects at least one of the sentences of the target object according to the user's historical learning record corresponding to the user identification number. A multimedia preview unit selects one of the multimedia data of the target object, wherein the selected multimedia data is highly related to the selected sentence.

Abstract: A system for generating a ‘snapshot’ of a learning object is provided. An interface receives a target object and a user identification number. The target object corresponds to a category, comprising a plurality of sentences and multimedia data, wherein the sentences comprise at least one keyword. A learning object database comprises a plurality of learning objects and a user's historical learning record. Each of the learning objects corresponds to at least one category, and comprises at least one keyword. The user's historical learning record comprises a track record of learning objects used corresponding to the user identification number. A script preview unit selects at least one of the sentences of the target object according to the user's historical learning record corresponding to the user identification number. A multimedia preview unit selects one of the multimedia data of the target object, wherein the selected multimedia data is highly related to the selected sentence.

Abstract: A system for constructing data tag based on a concept relation network is disclosed. A tagging module collects input tags from users to create a tag table accordingly. A count of each tag used is calculated and compared with a predefined threshold value to generate two tag count tables. Relations between each tag and others are calculated. Additionally, an incremental concept is applied to maintain tags in the concept relation network.