Patents by Inventor Yi-Chi Liao

Yi-Chi Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and electronic device for enhancing efficiency of searching for regions of interest in a virtual environment
    Patent number: 10990843
    Abstract: A method and an electronic device for enhancing efficiency of searching for a region of interest in a virtual environment are provided. The virtual environment includes a visible scene and an invisible scene. A picture-in-picture (PIP) is displayed in the visible scene as a directional guidance or distance hint related to the region of interest in the invisible scene, thereby saving time and enhancing efficiency of searching for the region of interest.
    Type: Grant
    Filed: June 19, 2018
    Date of Patent: April 27, 2021
    Assignees: National Taiwan University, Mediatek Inc.
    Inventors: Yung-Ta Lin, Yi-Chi Liao, Shan-Yuan Teng, Yi-Ju Chung, Li-Wei Chan, Bing-Yu Chen
  • METHOD AND ELECTRONIC DEVICE FOR ENHANCING EFFICIENCY OF SEARCHING FOR REGIONS OF INTEREST IN A VIRTUAL ENVIRONMENT
    Publication number: 20190279015
    Abstract: A method and an electronic device for enhancing efficiency of searching for a region of interest in a virtual environment are provided. The virtual environment includes a visible scene and an invisible scene. A picture-in-picture (PIP) is displayed in the visible scene as a directional guidance or distance hint related to the region of interest in the invisible scene, thereby saving time and enhancing efficiency of searching for the region of interest.
    Type: Application
    Filed: June 19, 2018
    Publication date: September 12, 2019
    Inventors: Yung-Ta LIN, Yi-Chi LIAO, Shan-Yuan TENG, Yi-Ju CHUNG, Li-Wei CHAN, Bing-Yu CHEN
  • SYSTEM FOR DISPLAY IMAGES AND FABRICATION METHOD OF DISPLAY PANELS
    Publication number: 20100215873
    Abstract: A system for displaying images including a display panel and a fabrication method of a display panel are provided. The display panel includes a first substrate and a second substrate opposite to the first substrate, wherein a total thickness of assembling the first and the second substrates is reduced by a thinning process, and by utilizing an acrylic-based or an epoxy acrylic-based polymer film to cover the outer surfaces of the first and the second substrates.
    Type: Application
    Filed: October 7, 2009
    Publication date: August 26, 2010
    Applicants: TPO DISPLAYS CORP., GLOBAL DISPLAY TAIWAN CO., LTD.
    Inventors: Yi-Chi LIAO, Shih-Yao LIN, Li-Chen WEI
  • Methods for forming interconnect structures
    Patent number: 7410895
    Abstract: A method for forming an interconnect structure. A substrate is provided with a low-k dielectric layer thereon. At least one conductive feature is then formed in the low-k dielectric layer. A cap layer is formed overlying the low-k dielectric layer, and the conductive feature and the low-k dielectric layer is then subjected to an energy source to reduce a dielectric constant thereof.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: August 12, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd
    Inventors: Keng-Chu Lin, Chung-Chi Ko, Yi-Chi Liao
  • Method of fabricating semiconductor device
    Patent number: 7256124
    Abstract: A method of fabricating a semiconductor device. A semiconductor substrate with a patterned conductive layer on a top surface of the substrate is first provided. A dielectric layer is then formed to cover the substrate. Thereafter, an electron beam irradiation procedure is performed to anneal the patterned conductive layer and reduce resistance of the patterned conductive layer.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: August 14, 2007
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Keng-Chu Lin, Yi-Chi Liao, Hung-Chun Tsai, Yung-Cheng Lu, Hung-Wen Su
  • Methods for forming interconnect structures
    Publication number: 20070015355
    Abstract: A method for forming an interconnect structure. A substrate is provided with a low-k dielectric layer thereon. At least one conductive feature is then formed in the low-k dielectric layer. A cap layer is formed overlying the low-k dielectric layer, and the conductive feature and the low-k dielectric layer is then subjected to an energy source to reduce a dielectric constant thereof.
    Type: Application
    Filed: July 12, 2005
    Publication date: January 18, 2007
    Inventors: Keng-Chu Lin, Chung-Chi Ko, Yi-Chi Liao
  • Method of fabricating semiconductor device
    Publication number: 20060228856
    Abstract: A method of fabricating a semiconductor device. A semiconductor substrate with a patterned conductive layer on a top surface of the substrate is first provided. A dielectric layer is then formed to cover the substrate. Thereafter, an electron beam irradiation procedure is performed to anneal the patterned conductive layer and reduce resistance of the patterned conductive layer.
    Type: Application
    Filed: March 30, 2005
    Publication date: October 12, 2006
    Inventors: Keng-Chu Lin, Yi-Chi Liao, H. Tsai, Yung-Cheng Lu, Hung-Wen Su