Abstract: A method for the selective formation of epitaxial layers is described herein. In the method, epitaxial layers are deposited to form source and drain regions around a horizontal gate all around (hGAA structure). The method includes co-flowing a combination of chlorinated silicon containing precursors, antimony containing precursors, and n-type dopant precursors. The resulting source and drain regions are selectively grown from crystalline nanosheets or nanowires of the hGAA structure over the non-crystalline gate structure and dielectric layers. The source and drain regions are predominantly grown in a <110> direction.

Abstract: Embodiments of the present disclosure generally relate to a substrate support having a surface coating which reduces defect formation and back side metal contamination during substrate processing. A support body includes a body having an outer surface and a surface coating formed from a non-metal or a reduced-metal material disposed over at least a top surface of the outer surface of the body. In an embodiment, the surface coating includes a two-part coating having an optional first coating layer formed over an entire outer surface of the support body.

Abstract: In one embodiment, a susceptor for thermal processing is provided. The susceptor includes an outer rim surrounding and coupled to an inner dish, the outer rim having an inner edge and an outer edge. The susceptor further includes one or more structures for reducing a contacting surface area between a substrate and the susceptor when the substrate is supported by the susceptor. At least one of the one or more structures is coupled to the inner dish proximate the inner edge of the outer rim.

Abstract: One or more embodiments described herein relate to selective methods for fabricating devices and structures. In these embodiments, the devices are exposed inside the process volume of a process chamber. Precursor gases are flowed in the process volume at certain flow ratios and at certain process conditions. The process conditions described herein result in selective epitaxial layer growth on the {100} planes of the crystal planes of the devices, which corresponds to the top of each of the fins. Additionally, the process conditions result in selective etching of the {110} plane of the crystal planes, which corresponds to the sidewalls of each of the fins. As such, the methods described herein provide a way to grow or etch epitaxial films at different crystal planes. Furthermore, the methods described herein allow for simultaneous epitaxial film growth and etch to occur on the different crystal planes.

Abstract: A method includes performing an etch process, including supplying a first process gas and a second process gas onto a surface of a substrate on a substrate support within a processing volume of a processing chamber for a first time duration, wherein the first process gas comprises fluorine-containing gas, and the second process gas comprises nitrogen-containing gas, and performing an anneal process to sublimate by-products formed on the surface of the substrate during the etch process, and supplying the first process gas without supplying the second process gas into the processing volume of the processing chamber for a second time duration.

Abstract: A method of forming an oxidation barrier layer in a semiconductor structure includes forming a contact layer on an exposed surface of a semiconductor region of a semiconductor structure in a first processing chamber, wherein the semiconductor region comprises silicon germanium doped with p-type dopants and the contact layer comprises silicon germanium (SiGe) with a ratio of germanium (Ge) ranging between 60% and 100%, and forming an oxidation barrier layer comprising gallium (Ga) on the contact layer, by applying gallium (Ga)-containing liquid precursor to a surface of the contact layer in the first processing chamber.

Abstract: Silicon germanium (SiGe)/silicon containing superlattice structure and methods for forming the same are provided. Various embodiments utilize SiGe layers in a SiGe/Si superlattice structure, which include varying concentrations of germanium throughout the layer to achieve reduced dislocations or a dislocation-free superlattice. For example, in some embodiments, for each SiGe layer there is a core SiGe film with a low Ge content and two thinner SiGe layers or cladding layers positioned on opposing sides of the core SiGe film with each of the SiGe cladding layers having a higher Ge content then the core SiGe film. Various embodiments provide for SiGe layers having a germanium depth profile enabling strained SiGe superlattice deposition on Si{110} substrates.

Abstract: In one embodiment, a susceptor for thermal processing is provided. The susceptor includes an outer rim surrounding and coupled to an inner dish, the outer rim having an inner edge and an outer edge. The susceptor further includes one or more structures for reducing a contacting surface area between a substrate and the susceptor when the substrate is supported by the susceptor. At least one of the one or more structures is coupled to the inner dish proximate the inner edge of the outer rim.

Abstract: A method for the selective formation of epitaxial layers is described herein. In the method, epitaxial layers are deposited to form source and drain regions around a horizontal gate all around (hGAA structure). The method includes co-flowing a combination of chlorinated silicon containing precursors, antimony containing precursors, and n-type dopant precursors. The resulting source and drain regions are selectively grown from crystalline nanosheets or nanowires of the hGAA structure over the non-crystalline gate structure and dielectric layers. The source and drain regions are predominantly grown in a <110> direction.

Abstract: Methods for depositing a silicon germanium tin boron (SiGeSn:B) film on a substrate are described. The method comprises exposing a substrate to a precursor mixture comprising a boron precursor, a silicon precursor, a germanium precursor, and a tin precursor to form a boron silicon germanium tin (SiGeSn:B) film on the substrate.

Abstract: Embodiments described herein relate to a method of epitaxial deposition of p-channel metal oxide semiconductor (MMOS) source/drain regions within horizontal gate all around (hGAA) device structures. Combinations of precursors are described herein, which grow of the source/drain regions on predominantly <100> surfaces with reduced or negligible growth on <110> surfaces. Therefore, growth of the source/drain regions is predominantly located on the top surface of a substrate instead of the alternating layers of the hGAA structure. The precursor combinations include a silicon containing precursor, a germanium containing precursor, and a boron containing precursor. At least one of the precursors further includes chlorine.

Abstract: Embodiments of the present disclosure generally relate to a substrate support having a two-part surface coating which reduces defect formation and back side metal contamination during substrate processing. A support body includes a body having an upper surface and a two-part coating disposed over the upper surface of the body. The two-part coating includes a first coating layer extending a first radial distance from a center of the body. The first coating layer includes at least one of a metal-containing material or alloy. The two-part coating includes a second coating layer disposed over the first coating layer. The second coating layer extends a second radial distance from the center of the body. The first radial distance is greater than the second radial distance. The second coating layer is non-metal.

Abstract: Embodiments of the present disclosure generally relate to an integrated substrate processing system for cleaning a substrate surface and subsequently performing an epitaxial deposition process thereon. A processing system includes a film formation chamber, a transfer chamber coupled to the film formation chamber, and an oxide removal chamber coupled to the transfer chamber, the oxide removal chamber having a substrate support. The processing system includes a controller configured to introduce a process gas mixture into the oxide removal chamber, the process gas mixture including a fluorine-containing gas and a vapor including at least one of water, an alcohol, an organic acid, or combinations thereof. The controller is configured to expose a substrate positioned on the substrate support to the process gas mixture, thereby removing an oxide film from the substrate.

Abstract: A method of selectively and conformally doping semiconductor materials is disclosed. Some embodiments utilize a conformal dopant film deposited selectively on semiconductor materials by thermal decomposition. Some embodiments relate to doping non-line of sight surfaces. Some embodiments relate to methods for forming a highly doped crystalline semiconductor layer.

Abstract: Generally, examples described herein relate to methods and semiconductor processing systems for anisotropically epitaxially growing a material on a silicon germanium (SiGe) surface. In an example, a surface of silicon germanium is formed on a substrate. Epitaxial silicon germanium is epitaxially grown on the surface of silicon germanium. A first growth rate of the epitaxial silicon germanium is in a first direction perpendicular to the surface of silicon germanium, and a second growth rate of the epitaxial silicon germanium is in a second direction perpendicular to the first direction. The first growth rate is at least 5 times greater than the second growth rate.

Abstract: One or more embodiments described herein relate to selective methods for fabricating devices and structures. In these embodiments, the devices are exposed inside the process volume of a process chamber. Precursor gases are flowed in the process volume at certain flow ratios and at certain process conditions. The process conditions described herein result in selective epitaxial layer growth on the {100} planes of the crystal planes of the devices, which corresponds to the top of each of the fins. Additionally, the process conditions result in selective etching of the {110} plane of the crystal planes, which corresponds to the sidewalls of each of the fins. As such, the methods described herein provide a way to grow or etch epitaxial films at different crystal planes. Furthermore, the methods described herein allow for simultaneous epitaxial film growth and etch to occur on the different crystal planes.

Abstract: A method of selectively and conformally doping semiconductor materials is disclosed. Some embodiments utilize a conformal dopant film deposited selectively on semiconductor materials by thermal decomposition. Some embodiments relate to doping non-line of sight surfaces. Some embodiments relate to methods for forming a highly doped crystalline semiconductor layer.

Abstract: A method for the selective formation of epitaxial layers is described herein. In the method, epitaxial layers are deposited to form source and drain regions around a horizontal gate all around (hGAA structure). The method includes co-flowing a combination of chlorinated silicon containing precursors, antimony containing precursors, and n-type dopant precursors. The resulting source and drain regions are selectively grown from crystalline nanosheets or nanowires of the hGAA structure over the non-crystalline gate structure and dielectric layers. The source and drain regions are predominantly grown in a <110> direction.

Abstract: Methods for depositing a silicon germanium tin boron (SiGeSn:B) film on a substrate are described. The method comprises exposing a substrate to a precursor mixture comprising a boron precursor, a silicon precursor, a germanium precursor, and a tin precursor to form a boron silicon germanium tin (SiGeSn:B) film on the substrate.

Abstract: Methods and apparatus for forming doped material layers in semiconductor devices using an integrated selective monolayer doping (SMLD) process. A concentration of dopant is deposited on a material layer using the SMLD process and the concentration of dopant is then annealed to diffuse the concentration of dopant into the material layer. The SMLD process conforms the concentration of dopant to a surface of the material layer and may be performed in a single CVD chamber. The SMLD process may also be repeated to further alter the diffusion parameters of the dopant into the material layer. The SMLD process is compatible with p-type dopant species and n-type dopant species.