Patents by Inventor Yi-Chieh HSIEH

Yi-Chieh HSIEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250038133
    Abstract: A semiconductor structure and a semiconductor die are provided. The semiconductor structure includes a semiconductor substrate, an electronic circuit, a first seal ring, a buffer zone and a conductive routing. The semiconductor substrate has a circuit region and a seal ring region surrounding the circuit region. The electronic circuit is disposed on the semiconductor substrate in the circuit region. The first seal ring is disposed on the semiconductor substrate in the seal ring region and surrounding the circuit region. The buffer zone is located in the seal ring region and interposed between the circuit region and the first seal ring. The first seal ring is separated from the circuit region by the buffer zone. The conductive routing is disposed on the semiconductor substrate in the buffer zone. The conductive routing is electrically connected to the electronic circuit.
    Type: Application
    Filed: June 26, 2024
    Publication date: January 30, 2025
    Inventors: Chi-Shun CHENG, Yung-Chieh YU, Yi-Chieh HSIEH
  • Patent number: 11964881
    Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: April 23, 2024
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Pu-Wei Wu, Yi-Chieh Hsieh, Han-Yi Wang, Kuang-Chih Tso, Tzu-Ying Chan, Chung-Kai Chang, Chi-Shih Chen, Yu-Ting Cheng
  • Publication number: 20210292187
    Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.
    Type: Application
    Filed: July 27, 2020
    Publication date: September 23, 2021
    Inventors: Pu-Wei Wu, Yi-Chieh Hsieh, Han-Yi Wang, Kuang-Chih Tso, Tzu-Ying Chan
  • Publication number: 20210032736
    Abstract: A method of chemical deposition of Iridium oxide film on rigid substrate is provided. The method comprises providing a rigid substrate in a container, adding an iridium precursor and mixing the iridium precursor with water to form an iridium precursor liquid in the container, adding and mixing an oxidant with the iridium precursor liquid in the container; and depositing an iridium oxide film on the rigid substrate in the container. A chelating agent and pH adjustor can be either selectively used for stabilizing the chemical bath deposition and for adjusting pH value of the liquid. For a variety of rigid substrates to be applied, the pH adjustor can adjust the pH value within a range of 4˜13. By employing the proposed fabrication method, it is extraordinarily advantageous of chemical alkaline as well as chemical acid deposition formula with configuration of depositing sodium-doped IrOx iridium oxide film.
    Type: Application
    Filed: July 30, 2019
    Publication date: February 4, 2021
    Inventors: PU-WEI WU, CHUNG-YU WU, KUANG-CHIH TSO, YI-CHIEH HSIEH, HAN-YI WANG
  • Patent number: 10872805
    Abstract: A semiconductor device includes a substrate, a shallow trench isolation (STI) structure, a first source/drain, a second source/drain, and an isolation dielectric. The substrate has a semiconductor fin. The STI structure surrounds the semiconductor fin. The first source/drain is embedded in the semiconductor fin. The second source/drain is embedded in the semiconductor fin. The isolation dielectric is between the first and second source/drains and extending into the semiconductor fin. An upper surface of the STI structure is free from coverage of the isolation dielectric.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: December 22, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuei-Ming Chang, Chi-Wei Wu, Yi-Chieh Hsieh
  • Publication number: 20200105581
    Abstract: A semiconductor device includes a substrate, a shallow trench isolation (STI) structure, a first source/drain, a second source/drain, and an isolation dielectric. The substrate has a semiconductor fin. The STI structure surrounds the semiconductor fin. The first source/drain is embedded in the semiconductor fin. The second source/drain is embedded in the semiconductor fin. The isolation dielectric is between the first and second source/drains and extending into the semiconductor fin. An upper surface of the STI structure is free from coverage of the isolation dielectric.
    Type: Application
    Filed: December 3, 2018
    Publication date: April 2, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Kuei-Ming CHANG, Chi-Wei WU, Yi-Chieh HSIEH