Patents by Inventor Yi-Chien Wu
Yi-Chien Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250244198Abstract: An optical test structure includes a substrate and at least one optical unit. The at least one optical unit is disposed on the substrate, and includes a first optical element, a second optical element, a third optical element, and a fourth optical element which are spaced apart from each other. The second optical element is disposed between the first optical element and the third optical element. The third optical element is disposed between the second optical element and the fourth optical element. A size of the third optical element is larger than a size of each of the first optical element, the second optical element, and the fourth optical element. The size of each of the second optical element and the fourth optical element is larger than the size of the first optical element.Type: ApplicationFiled: January 31, 2024Publication date: July 31, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Tsun-Hsu CHEN, Yi-Chien WU, Wei Siang TAN, Cheng-Che CHUNG, Yu-Chia LIU, Kang-Che HUANG, Jung-Huei PENG, Chun-Wen CHENG
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Patent number: 12376401Abstract: Optical modules and methods of forming the same are provided. In an embodiment, an exemplary method includes forming multiple first optical elements over a first wafer, forming multiple second optical elements over a second wafer, forming multiple third optical elements over a third wafer, aligning the first wafer with the second wafer such that, upon the aligning of the first wafer with the second wafer, each first optical element is vertically overlapped with a corresponding second optical element. The method also includes bonding the first wafer with the second wafer to form a first bonded structure, aligning the second wafer with the third wafer such that, and upon bonding the second wafer of the first bonded structure to the third wafer, where upon the aligning of the second wafer with the third wafer, each second optical element is vertically overlapped with a corresponding third optical element.Type: GrantFiled: August 31, 2022Date of Patent: July 29, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Jung-Huei Peng, Chun-Wen Cheng, Yi-Chien Wu
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Patent number: 12221337Abstract: The present disclosure provides a structure and method of fabricating the structure. The structure comprises a cavity enclosed by a first substrate and a second substrate opposite to the first substrate. Further, the structure includes a feature in the cavity and the feature is protruded from a surface of the first substrate. In addition, the structure includes a dielectric layer over the feature, wherein the dielectric layer includes a first surface in contact with the feature and a second surface opposite to the first surface is positioned toward the cavity.Type: GrantFiled: July 25, 2023Date of Patent: February 11, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yuan-Chih Hsieh, Hsing-Lien Lin, Jung-Huei Peng, Yi-Chien Wu
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Publication number: 20240085678Abstract: Various embodiments of the present disclosure are directed towards a camera module comprising flat lenses. Flat lenses have reduced thicknesses compared to other types of lenses, whereby the camera module may have a small size and camera bumps may be omitted or reduced in size on cell phones and the like incorporating the camera module. The flat lenses are configured to focus visible light into a beam of white light, split the beam into sub-beams of red, green, and blue light, and guide the sub-beams respectively to separate image sensors for red, green, and blue light. The image sensors generate images for corresponding colors and the images are combined into a full-color image. Optically splitting the beam into the sub-beams and using separate image sensors for the sub-beams allows color filters to be omitted and smaller pixel sensors. This, in turn, allows higher quality imaging.Type: ApplicationFiled: May 8, 2023Publication date: March 14, 2024Inventors: Jung-Huei Peng, Chun-Wen Cheng, Yi-Chien Wu, Tsun-Hsu Chen
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Publication number: 20230365395Abstract: The present disclosure provides a structure and method of fabricating the structure. The structure comprises a cavity enclosed by a first substrate and a second substrate opposite to the first substrate. Further, the structure includes a feature in the cavity and the feature is protruded from a surface of the first substrate. In addition, the structure includes a dielectric layer over the feature, wherein the dielectric layer includes a first surface in contact with the feature and a second surface opposite to the first surface is positioned toward the cavity.Type: ApplicationFiled: July 25, 2023Publication date: November 16, 2023Inventors: Yuan-Chih Hsieh, Hsing-Lien Lin, Jung-Huei Peng, Yi-Chien Wu
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Publication number: 20230317753Abstract: Optical modules and methods of forming the same are provided. In an embodiment, an exemplary method includes forming multiple first optical elements over a first wafer, forming multiple second optical elements over a second wafer, forming multiple third optical elements over a third wafer, aligning the first wafer with the second wafer such that, upon the aligning of the first wafer with the second wafer, each first optical element is vertically overlapped with a corresponding second optical element. The method also includes bonding the first wafer with the second wafer to form a first bonded structure, aligning the second wafer with the third wafer such that, and upon bonding the second wafer of the first bonded structure to the third wafer, where upon the aligning of the second wafer with the third wafer, each second optical element is vertically overlapped with a corresponding third optical element.Type: ApplicationFiled: August 31, 2022Publication date: October 5, 2023Inventors: Jung-Huei Peng, Chun-Wen Cheng, Yi-Chien Wu
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Patent number: 11767216Abstract: The present disclosure provides a structure. The structure comprises a cavity enclosed by a first substrate and a second substrate opposite to the first substrate. Further, the structure includes a feature in the cavity and the feature is protruded from a surface of the first substrate. In addition, the structure includes a dielectric layer over the feature, wherein the dielectric layer includes a first surface in contact with the feature and a second surface opposite to the first surface is positioned toward the cavity.Type: GrantFiled: September 25, 2020Date of Patent: September 26, 2023Assignee: Taiwan Semiconductor Manufacturing Company Ltd.Inventors: Yuan-Chih Hsieh, Hsing-Lien Lin, Jung-Huei Peng, Yi-Chien Wu
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Patent number: 11505454Abstract: A method for manufacturing a MEMS structure is provided. The method includes providing a MEMS substrate having a first surface, forming a first buffer layer on the first surface of the MEMS substrate, and forming a first roughening layer on the first buffer layer. Also, a MEMS structure is provided. The MEMS structure includes a MEMS substrate, a first buffer layer, a first roughening layer, and a CMOS substrate. The MEMS substrate has a first surface and a pillar is on the first surface. The first buffer layer is on the first surface. The first roughening layer is on the first buffer layer. The CMOS substrate has a second surface and is bonded to the MEMS substrate via the pillar. Moreover, an air gap is between the first roughening layer and the second surface of the CMOS substrate.Type: GrantFiled: September 25, 2019Date of Patent: November 22, 2022Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Kang-Che Huang, Yi-Chien Wu, Shiang-Chi Lin, Jung-Huei Peng, Chun-Wen Cheng
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Publication number: 20210207150Abstract: Methods, devices, and systems are provided for the delivery of agents (e.g., nucleic acids, proteins, organic molecules, organelles, antibodies or other ligands, etc.) into live cells and/or the extraction of the same from said cells. In various embodiments the photothermal platforms and systems incorporating such photothermal platforms are provided that permit efficient, high-throughput cargo delivery into live cells.Type: ApplicationFiled: March 16, 2021Publication date: July 8, 2021Applicant: The Regents of the University of CaliforniaInventors: Yi-Chien Wu, Ting-Hsiang S. Wu, Pei-Yu E. Chiou, Michael A. Teitell
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Patent number: 10982217Abstract: Methods, devices, and systems are provided for the delivery of agents (e.g., nucleic acids, proteins, organic molecules, organelles, antibodies or other ligands, 5 etc.) into live cells and/or the extraction of the same from said cells. In various embodiments the photothermal platforms and systems incorporating such photothermal platforms are provided that permit efficient, high-throughput cargo delivery into live cells.Type: GrantFiled: March 13, 2014Date of Patent: April 20, 2021Assignee: The Regents of the University of CaliforniaInventors: Yi-Chien Wu, Ting-Hsiang S. Wu, Pei-Yu E. Chiou, Michael A. Teitell
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Publication number: 20210087056Abstract: A method for manufacturing a MEMS structure is provided. The method includes providing a MEMS substrate having a first surface, forming a first buffer layer on the first surface of the MEMS substrate, and forming a first roughening layer on the first buffer layer. Also, a MEMS structure is provided. The MEMS structure includes a MEMS substrate, a first buffer layer, a first roughening layer, and a CMOS substrate. The MEMS substrate has a first surface and a pillar is on the first surface. The first buffer layer is on the first surface. The first roughening layer is on the first buffer layer. The CMOS substrate has a second surface and is bonded to the MEMS substrate via the pillar. Moreover, an air gap is between the first roughening layer and the second surface of the CMOS substrate.Type: ApplicationFiled: September 25, 2019Publication date: March 25, 2021Inventors: KANG-CHE HUANG, YI-CHIEN WU, SHIANG-CHI LIN, JUNG-HUEI PENG, CHUN-WEN CHENG
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Publication number: 20210053816Abstract: The present disclosure provides a structure. The structure comprises a cavity enclosed by a first substrate and a second substrate opposite to the first substrate. Further, the structure includes a feature in the cavity and the feature is protruded from a surface of the first substrate. In addition, the structure includes a dielectric layer over the feature, wherein the dielectric layer includes a first surface in contact with the feature and a second surface opposite to the first surface is positioned toward the cavity.Type: ApplicationFiled: September 25, 2020Publication date: February 25, 2021Inventors: Yuan-Chih HSIEH, Hsing-Lien LIN, Jung-Huei PENG, Yi-Chien WU
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Patent number: 10787657Abstract: In various embodiments methods are provided for delivering an agent of interest (e.g., protein, antibody, nucleic acid) into cells. In certain embodiments the method comprises contacting the cells with anisotropic magnetic particles in the presence of the agent; and applying a substantially uniform magnetic field to said magnetic particles where movement of said particles induced by said magnetic field introduces transient openings into said cell facilitating entry of said agent of interest into said cells.Type: GrantFiled: December 21, 2016Date of Patent: September 29, 2020Assignee: The Regents of the University of CaliforniaInventors: Pei-Yu E. Chiou, Michael A. Teitell, Ming-Yu Lin, Yi-Chien Wu, Jessica Zhou
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Patent number: 10787360Abstract: The present disclosure provides a method of manufacturing a structure. The method comprises: providing a first substrate; forming a conductive mesa over the first substrate; forming a silicon containing layer over the mesa; and forming a cavity comprising a movable member proximal to the first substrate.Type: GrantFiled: April 29, 2019Date of Patent: September 29, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yuan-Chih Hsieh, Hsing-Lien Lin, Jung-Huei Peng, Yi-Chien Wu
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Publication number: 20190256346Abstract: The present disclosure provides a method of manufacturing a structure. The method comprises: providing a first substrate; forming a conductive mesa over the first substrate; forming a silicon containing layer over the mesa; and forming a cavity comprising a movable member proximal to the first substrate.Type: ApplicationFiled: April 29, 2019Publication date: August 22, 2019Inventors: Yuan-Chih HSIEH, Hsing-Lien Lin, Jung-Huei Peng, Yi-Chien Wu
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Patent number: 10273142Abstract: The present disclosure provides a structure. The structure comprises a cavity enclosed by a first substrate and a second substrate opposite to the first substrate. The structure also includes a movable membrane in the cavity. Further, the structure includes a mesa in the cavity and the mesa is protruded from a surface of the first substrate. In addition, the structure includes a dielectric layer over the mesa, wherein the dielectric layer includes a first surface in contact with the mesa and a second surface opposite to the first surface is positioned toward the cavity.Type: GrantFiled: November 21, 2017Date of Patent: April 30, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Yuan-Chih Hsieh, Hsing-Lien Lin, Jung-Huei Peng, Yi-Chien Wu
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Patent number: 10202278Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a cavity disposed in a substrate and enclosed by a first surface and a second surface opposite to the first surface. The semiconductor structure also includes a first electrode pair having a first electrode on the first surface and a second electrode on the second surface. The first electrode pair is configured to measure a first spacing between the first surface and the second surface. The semiconductor structure further includes a second electrode pair having a third electrode on the first surface and a fourth electrode on the second surface. The second electrode pair is configured to measure a second spacing between the first surface and the second surface.Type: GrantFiled: September 2, 2016Date of Patent: February 12, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Jung-Huei Peng, Yi-Chien Wu, Yu-Chia Liu, Chun-Wen Cheng
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Publication number: 20180099865Abstract: The present disclosure provides a structure. The structure comprises a cavity enclosed by a first substrate and a second substrate opposite to the first substrate. The structure also includes a movable membrane in the cavity. Further, the structure includes a mesa in the cavity and the mesa is protruded from a surface of the first substrate. In addition, the structure includes a dielectric layer over the mesa, wherein the dielectric layer includes a first surface in contact with the mesa and a second surface opposite to the first surface is positioned toward the cavity.Type: ApplicationFiled: November 21, 2017Publication date: April 12, 2018Inventors: Yuan-Chih HSIEH, Hsing-Lien LIN, Jung-Huei PENG, Yi-Chien WU
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Patent number: 9938134Abstract: A microelectromechanical systems (MEMS) package with high gettering efficiency is provided. A MEMS device is arranged over a logic chip, within a cavity that is hermetically sealed. A sensing electrode is arranged within the cavity, between the MEMS device and the logic chip. The sensing electrode is electrically coupled to the logic chip and is a conductive getter material configured to remove gas molecules from the cavity. A method for manufacturing the MEMS package is also provided.Type: GrantFiled: July 8, 2016Date of Patent: April 10, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shiang-Chi Lin, Jung-Huei Peng, Yu-Chia Liu, Yi-Chien Wu, Wei Siang Tan
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Publication number: 20180065841Abstract: The present disclosure provides a semiconductor structure. The semiconductor structure includes a cavity disposed in a substrate and enclosed by a first surface and a second surface opposite to the first surface. The semiconductor structure also includes a first electrode pair having a first electrode on the first surface and a second electrode on the second surface. The first electrode pair is configured to measure a first spacing between the first surface and the second surface. The semiconductor structure further includes a second electrode pair having a third electrode on the first surface and a fourth electrode on the second surface. The second electrode pair is configured to measure a second spacing between the first surface and the second surface.Type: ApplicationFiled: September 2, 2016Publication date: March 8, 2018Inventors: JUNG-HUEI PENG, YI-CHIEN WU, YU-CHIA LIU, CHUN-WEN CHENG