Abstract: Interconnect structure packages (e.g., through silicon vias (TSV) packages, through interlayer via (TIV) packages) may be pre-manufactured as opposed to forming TIVs directly on a carrier substrate during a manufacturing process for a semiconductor die package at backend packaging facility. The interconnect structure packages may be placed onto a carrier substrate during manufacturing of a semiconductor device package, and a semiconductor die package may be placed on the carrier substrate adjacent to the interconnect structure packages. A molding compound layer may be formed around and in between the interconnect structure packages and the semiconductor die package.

Abstract: The present invention relates to an interference-eliminating membrane for use in detecting uric acid in a sample, comprising a compound for inhibiting or shading uric acid interfering substances, or derivatives thereof, and a carrier having an absorption property and permeability for the sample; and a process for preparing the interference-eliminating membrane. The present invention also provides a test strip for use in detecting uric acid in a sample, comprising a reagent reaction layer or optional interference-eliminating membranes and/or support layers; and a kit comprising the test strip of the invention.