Patents by Inventor Yi-Chih Wang

Yi-Chih Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967622
    Abstract: Embodiments provide a dielectric inter block disposed in a metallic region of a conductive line or source/drain contact. A first and second conductive structure over the metallic region may extend into the metallic region on either side of the inter block. The inter block can prevent etchant or cleaning solution from contacting an interface between the first conductive structure and the metallic region.
    Type: Grant
    Filed: September 3, 2021
    Date of Patent: April 23, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Te-Chih Hsiung, Jyun-De Wu, Yi-Chen Wang, Yi-Chun Chang, Yuan-Tien Tu
  • Patent number: 11964881
    Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: April 23, 2024
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Pu-Wei Wu, Yi-Chieh Hsieh, Han-Yi Wang, Kuang-Chih Tso, Tzu-Ying Chan, Chung-Kai Chang, Chi-Shih Chen, Yu-Ting Cheng
  • Publication number: 20240129012
    Abstract: A wearable device includes a frame element and a dielectric substrate. The frame element includes a first metal element, a second metal element, and a third metal element. A first gap is provided between the first metal element and the second metal element. A second gap is provided between the second metal element and the third metal element. A third gap is provided between the third metal element and the first metal element. The dielectric substrate is surrounded by the first metal element, the second metal element, and the third metal element. A first antenna element is formed by the first metal element. A second antenna element is formed by the second metal element. A third antenna element is formed by the third metal element.
    Type: Application
    Filed: December 6, 2022
    Publication date: April 18, 2024
    Inventors: Jing-Yao XU, Chung-Ting HUNG, Chun-Yuan WANG, Chu-Yu TANG, Yi-Chih LO, Yu-Chen ZHAO, Chih-Tsung TSENG
  • Patent number: 11961893
    Abstract: Improved conductive contacts, methods for forming the same, and semiconductor devices including the same are disclosed. In an embodiment, a semiconductor device includes a first interlayer dielectric (ILD) layer over a transistor structure; a first contact extending through the first ILD layer, the first contact being electrically coupled with a first source/drain region of the transistor structure, a top surface of the first contact being convex, and the top surface of the first contact being disposed below a top surface of the first ILD layer; a second ILD layer over the first ILD layer and the first contact; and a second contact extending through the second ILD layer, the second contact being electrically coupled with the first contact.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Te-Chih Hsiung, Jyun-De Wu, Yi-Chen Wang, Yi-Chun Chang, Yuan-Tien Tu
  • Publication number: 20240079409
    Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a substrate having a first fin structure. The semiconductor device structure includes a first source/drain structure over the first fin structure. The semiconductor device structure includes a first dielectric layer over the first source/drain structure and the substrate. The semiconductor device structure includes a first conductive contact structure in the first dielectric layer and over the first source/drain structure. The semiconductor device structure includes a second dielectric layer over the first dielectric layer and the first conductive contact structure. The semiconductor device structure includes a first conductive via structure passing through the second dielectric layer and connected to the first conductive contact structure. A first width direction of the first conductive contact structure is substantially parallel to a second width direction of the first conductive via structure.
    Type: Application
    Filed: November 6, 2023
    Publication date: March 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jyun-De WU, Te-Chih HSIUNG, Yi-Chun CHANG, Yi-Chen WANG, Yuan-Tien TU, Peng WANG, Huan-Just LIN
  • Patent number: 7924233
    Abstract: A three-dimensional antenna includes a substrate, a radiator, a second radiator, a signal feeding element, and a grounding element. The radiator is installed on the substrate. The radiator includes a first child radiator and a second child radiator. The first child radiator has a first end and a second end. The second child radiator has a first end and a second end, wherein the second end of the second child radiator is coupled to the second end of the first child radiator. The second radiator is coupled to the radiator. The signal feeding element is coupled to the first end of the first child radiator. The grounding element is coupled between the substrate and the first end of the second child radiator. The first child radiator and the second child radiator form an inverted V-shape installed on the substrate.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: April 12, 2011
    Assignee: Wistron NeWeb Corporation
    Inventors: Chih-Ming Wang, Feng-Chi Eddie Tsai, Yi-Chih Wang
  • Publication number: 20090102729
    Abstract: A three-dimensional antenna includes a substrate, a radiator, a second radiator, a signal feeding element, and a grounding element. The radiator is installed on the substrate. The radiator includes a first child radiator and a second child radiator. The first child radiator has a first end and a second end. The second child radiator has a first end and a second end, wherein the second end of the second child radiator is coupled to the second end of the first child radiator. The second radiator is coupled to the radiator. The signal feeding element is coupled to the first end of the first child radiator. The grounding element is coupled between the substrate and the first end of the second child radiator. The first child radiator and the second child radiator form an inverted V-shape installed on the substrate.
    Type: Application
    Filed: December 11, 2008
    Publication date: April 23, 2009
    Inventors: Chih-Ming Wang, Feng-Chi Eddie Tsai, Yi-Chih Wang