Patents by Inventor Yi-Ching Lee
Yi-Ching Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250006864Abstract: A semiconductor device is provided, which includes an epitaxial structure, a first contact electrode and a second contact electrode. The epitaxial structure includes a first semiconductor structure, a second semiconductor structure and an active region. The first semiconductor structure includes a first semiconductor contact layer. The second semiconductor structure includes a second semiconductor contact layer. The active region is located between the first semiconductor structure and the second semiconductor structure. The first contact electrode is located on the second semiconductor contact layer and directly contacts the first semiconductor contact layer. The second contact electrode is located on the second semiconductor contact layer and directly contacts the second semiconductor contact layer. The first semiconductor contact layer has a conductivity type of n-type and includes a first group III-V semiconductor material.Type: ApplicationFiled: June 27, 2024Publication date: January 2, 2025Inventors: Yi-Chieh LIN, Shih-Chang LEE, Wei-Chu LIAO, Mei-Chun LIU, Hui-Ching FENG, Zhen-Kai KAO, Yih-Hua RENN, Min-Hsun HSIEH
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Patent number: 12170202Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.Type: GrantFiled: January 2, 2023Date of Patent: December 17, 2024Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Po-Yu Lin, Chi-Yu Chou, Hsien-Ming Lee, Huai-Tei Yang, Chun-Chieh Wang, Yueh-Ching Pai, Chi-Jen Yang, Tsung-Ta Tang, Yi-Ting Wang
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Publication number: 20240363350Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.Type: ApplicationFiled: July 8, 2024Publication date: October 31, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Yu LIN, Chi-Yu CHOU, Hsien-Ming LEE, Huai-Tei YANG, Chun-Chieh WANG, Yueh-Ching PAI, Chi-Jen YANG, Tsung-Ta TANG, Yi-Ting WANG
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Publication number: 20240363545Abstract: An electronic package and a manufacturing method thereof are provided, in which a full-panel wafer is provided and includes a plurality of electronic bodies arranged in an array at intervals, a plurality of trenches are formed across the electronic bodies along a first direction on the full-panel wafer, so that the trenches on a single electronic body are arranged parallel to each other at interval and along a second direction perpendicular to the first direction. Then, in a singulation process, any trench can be selected for cutting to obtain a plurality of electronic elements of a required size. Finally, each of the electronic elements is disposed on a packaging region of a carrier structure, so that each of the electronic elements is electrically connected to at least a portion of electrical contact pads in the packaging region.Type: ApplicationFiled: July 14, 2023Publication date: October 31, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Che-Yu LEE, Chi-Ching HO, Chao-Chiang PU, Yi-Min FU, Po-Yuan SU
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Publication number: 20240264389Abstract: An electronic package and the manufacturing method thereof are provided, in which a photonic element and an electronic element are embedded in an encapsulation layer, and the photonic element has an external contact area exposed from the encapsulation layer, such that signals of the electronic element can be directly transmitted to an optical fiber via the external contact area of the photonic element to achieve the purpose of photoelectric integration.Type: ApplicationFiled: May 2, 2023Publication date: August 8, 2024Inventors: Chao-Chiang PU, Chi-Ching HO, Yi-Min FU, Che-Yu LEE, Po-Yuan SU
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Patent number: 12051767Abstract: A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure, and an active region. The first semiconductor structure includes a first dopant. The second semiconductor structure is located on the first semiconductor structure and includes a second dopant different from the first dopant. The active region includes a plurality of semiconductor pairs and located between the first semiconductor structure and the second semiconductor structure. Each semiconductor pair includes a barrier layer and a well layer and includes the first dopant. The active region does not include a nitrogen element. A doping concentration of the first dopant in the first semiconductor structure is higher than a doping concentration of the first dopant in the active region.Type: GrantFiled: January 20, 2023Date of Patent: July 30, 2024Assignee: EPISTAR CORPORATIONInventors: Yen-Chun Tseng, Kuo-Feng Huang, Shih-Chang Lee, Ming-Ta Chin, Shih-Nan Yen, Cheng-Hsing Chiang, Chia-Hung Lin, Cheng-Long Yeh, Yi-Ching Lee, Jui-Che Sung, Shih-Hao Cheng
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Publication number: 20230243810Abstract: A method of inhibiting an overactive fibroblast growth factor receptor 3 (FGFR3) in a cell by contacting the cell with a composition that contains an effective amount of Pheophorbide a, Pyropheophorbide a, or an active derivative thereof. Also disclosed is a method for treating a disorder associated with an overactive FGFR3 with a composition containing an effective amount of Pheophorbide a, Pyropheophorbide a, or an active derivative thereof. Further, a composition for treating a disorder associated with an overactive FGFR3 is described. The composition contains an ethanol extract of Amaranthus viridis.Type: ApplicationFiled: March 3, 2023Publication date: August 3, 2023Applicant: ACADEMIA SINICAInventors: Yuan-Tsong Chen, Yi-Ching Lee, Jer-Yuarn Wu, Hsiao-Jung Kao
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Patent number: 11630102Abstract: A method of inhibiting an overactive fibroblast growth factor receptor 3 (FGFR3) in a cell by contacting the cell with a composition that contains an effective amount of Pheophorbide a, Pyropheophorbide a, or an active derivative thereof. Also disclosed is a method for treating a disorder associated with an overactive FGFR3 with a composition containing an effective amount of Pheophorbide a, Pyropheophorbide a, or an active derivative thereof. Further, a composition for treating a disorder associated with an overactive FGFR3 is described. The composition contains an ethanol extract of Amaranthus viridis.Type: GrantFiled: February 8, 2018Date of Patent: April 18, 2023Assignee: ACADEMIA SINICAInventors: Yuan-Tsong Chen, Yi-Ching Lee, Jer-Yuam Wu, Hsiao-Jung Kao
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Publication number: 20230058195Abstract: A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure, and an active region. The first semiconductor structure includes a first semiconductor layer which includes a first dopant and a second dopant. The second semiconductor structure is located on the first semiconductor structure and includes the first dopan. The active region is located between the first semiconductor structure and the second semiconductor structure and includes the first dopant. The first dopant and the second dopant have different conductivity types.Type: ApplicationFiled: August 22, 2022Publication date: February 23, 2023Inventors: Shih-Nan YEN, Ming-Ta CHIN, Yi-Ching LEE, Cheng-Long YEH
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Patent number: 11588072Abstract: A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure, and an active region. The first semiconductor structure includes a first dopant. The second semiconductor structure is located on the first semiconductor structure and includes a second dopant different from the first dopant. The active region includes a plurality of semiconductor pairs and is located between the first semiconductor structure and the second semiconductor structure. One of the plurality of semiconductor pairs has a barrier layer and a well layer and includes the first dopant. The barrier layer has a first thickness and a first Al content, and the well layer has a second thickness and a second Al content, the second thickness is less than the first thickness, and the second Al content is less than the first Al content.Type: GrantFiled: November 4, 2020Date of Patent: February 21, 2023Assignee: EPISTAR CORPORATIONInventors: Yen-Chun Tseng, Kuo-Feng Huang, Shih-Chang Lee, Ming-Ta Chin, Shih-Nan Yen, Cheng-Hsing Chiang, Chia-Hung Lin, Cheng-Long Yeh, Yi-Ching Lee, Jui-Che Sung, Shih-Hao Cheng
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Publication number: 20210135052Abstract: A semiconductor device is provided, which includes a first semiconductor structure, a second semiconductor structure, and an active region. The first semiconductor structure includes a first dopant. The second semiconductor structure is located on the first semiconductor structure and includes a second dopant different from the first dopant. The active region includes a plurality of semiconductor pairs and is located between the first semiconductor structure and the second semiconductor structure. One of the plurality of semiconductor pairs has a barrier layer and a well layer and includes the first dopant. The barrier layer has a first thickness and a first Al content, and the well layer has a second thickness and a second Al content, the second thickness is less than the first thickness, and the second Al content is less than the first Al content.Type: ApplicationFiled: November 4, 2020Publication date: May 6, 2021Inventors: Yen-Chun Tseng, Kuo-Feng Huang, Shih-Chang Lee, Ming-Ta Chin, Shih-Nan Yen, Cheng-Hsing Chiang, Chia-Hung Lin, Cheng-Long Yeh, Yi-Ching Lee, Jui-Che Sung, Shih-Hao Cheng
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Patent number: 10749077Abstract: An optoelectronic device includes a semiconductor stack including a first surface and a second surface opposite to the first surface; a first contact layer on the first surface; and a second contact layer on the second surface. The second contact layer is not overlapped with the first contact layer in a vertical direction. The second contact layer includes a plurality of dots separating to each other and formed of semiconductor material.Type: GrantFiled: December 20, 2018Date of Patent: August 18, 2020Assignee: EPISTAR CORPORATIONInventors: Chun-Yu Lin, Yung-Fu Chang, Rong-Ren Lee, Kuo-Feng Huang, Cheng-Long Yeh, Yi-Ching Lee, Ming-Siang Huang, Ming-Tzung Liou
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Patent number: 10600938Abstract: A light-emitting device includes: a light-emitting stack including a first active layer emitting a first light having a first peak wavelength; a diode emitting a second light having a second peak wavelength between 800 nm and 1900 nm; and a tunneling junction between the diode and the light-emitting stack, wherein the tunneling junction includes a first tunneling layer and a second tunneling layer on the first tunneling layer, the first tunneling layer has a band gap and a thickness of the first tunneling layer is greater than a thickness of the second tunneling layer.Type: GrantFiled: May 18, 2018Date of Patent: March 24, 2020Assignee: EPISTAR CORPORATIONInventors: Chih-Chiang Lu, Yi-Chieh Lin, Rong-Ren Lee, Yu-Ren Peng, Ming-Siang Huang, Ming-Ta Chin, Yi-Ching Lee
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Patent number: 10580937Abstract: An optoelectronic device includes a semiconductor structure having a first side and a second side opposite to the first side, a first pad at the first side, a first finger connected to the electrode pad and having a first width, an insulating layer at the second side and comprising a first part under the first finger, the first part having a bottom surface with a second width larger than the first width and a side surface inclined to the bottom surface, and a contact layer covering the bottom surface and the side surface.Type: GrantFiled: December 20, 2018Date of Patent: March 3, 2020Assignee: EPISTAR CORPORATIONInventors: Chun-Yu Lin, Yung-Fu Chang, Rong-Ren Lee, Kuo-Feng Huang, Cheng-Long Yeh, Yi-Ching Lee, Ming-Siang Huang, Ming-Tzung Liou
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Publication number: 20190361004Abstract: A method of inhibiting an overactive fibroblast growth factor receptor 3 (FGFR3) in a cell by contacting the cell with a composition that contains an effective amount of Pheophorbide a, Pyropheophorbide a, or an active derivative thereof. Also disclosed is a method for treating a disorder associated with an overactive FGFR3 with a composition containing an effective amount of Pheophorbide a, Pyropheophorbide a, or an active derivative thereof. Further, a composition for treating a disorder associated with an overactive FGFR3 is described. The composition contains an ethanol extract of Amaranthus viridis.Type: ApplicationFiled: February 8, 2018Publication date: November 28, 2019Applicants: ACADEMIA SINICAInventors: Yuan-Tsong Chen, Yi-Ching Lee, Jer-Yuarn Wu, Hsiao-Jung Kao
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Publication number: 20190148599Abstract: An optoelectronic device includes a semiconductor stack including a first surface and a second surface opposite to the first surface; a first contact layer on the first surface; and a second contact layer on the second surface. The second contact layer is not overlapped with the first contact layer in a vertical direction. The second contact layer includes a plurality of dots separating to each other and formed of semiconductor material.Type: ApplicationFiled: December 20, 2018Publication date: May 16, 2019Inventors: Chun-Yu LIN, Yung-Fu CHANG, Rong-Ren LEE, Kuo-Feng HUANG, Cheng-Long YEH, Yi-Ching LEE, Ming-Siang HUANG, Ming-Tzung LIOU
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Publication number: 20190131496Abstract: An optoelectronic device includes a semiconductor structure having a first side and a second side opposite to the first side, a first pad at the first side, a first finger connected to the electrode pad and having a first width, an insulating layer at the second side and comprising a first part under the first finger, the first part having a bottom surface with a second width larger than the first width and a side surface inclined to the bottom surface, and a contact layer covering the bottom surface and the side surface.Type: ApplicationFiled: December 20, 2018Publication date: May 2, 2019Inventors: Chun-Yu LIN, Yung-Fu CHANG, Rong-Ren LEE, Kuo-Feng HUANG, Cheng-Long YEH, Yi-Ching LEE, Ming-Siang HUANG, Ming-Tzung LIOU
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Patent number: 10205059Abstract: The present disclosure is related to an optoelectronic device comprising a semiconductor stack comprising a first surface and a second surface opposite to the first surface; a first contact layer on the first surface; and a second contact layer on the second surface, wherein the second contact layer is not overlapped with the first contact layer in a vertical direction; wherein the second contact layer comprises a plurality of dots separating from each other and formed of semiconductor material.Type: GrantFiled: September 20, 2017Date of Patent: February 12, 2019Assignee: Epistar CorporationInventors: Chun-Yu Lin, Yung-Fu Chang, Rong-Ren Lee, Kuo-Feng Huang, Cheng-Long Yeh, Yi-Ching Lee, Ming-Siang Huang, Ming-Tzung Liou
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Publication number: 20180269358Abstract: A light-emitting device includes: a light-emitting stack including a first active layer emitting a first light having a first peak wavelength; a diode emitting a second light having a second peak wavelength between 800 nm and 1900 nm; and a tunneling junction between the diode and the light-emitting stack, wherein the tunneling junction includes a first tunneling layer and a second tunneling layer on the first tunneling layer, the first tunneling layer has a band gap and a thickness of the first tunneling layer is greater than a thickness of the second tunneling layer.Type: ApplicationFiled: May 18, 2018Publication date: September 20, 2018Inventors: Chih-Chiang LU, Yi-Chieh LIN, Rong-Ren LEE, Yu-Ren PENG, Ming-Siang HUANG, Ming-Ta CHIN, Yi-Ching LEE
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Patent number: 10008636Abstract: A light-emitting device is provided. comprises: a light-emitting stack comprising an active layer emitting a first light having a first peak wavelength ? nm; and an adjusting element stacked on and electrically connected to the active layer, wherein the adjusting element comprises a diode emitting a second light having a second peak wavelength between 800 nm and 1900 nm; wherein a forward voltage of the light-emitting device is between (1240/0.8?) volt and (1240/0.5?) volt, and a ratio of the intensity of the first light emitted from the active layer at the first peak wavelength to the intensity of the second light emitted from the diode at the second peak wavelength is greater than 10 and not greater than 1000.Type: GrantFiled: October 27, 2017Date of Patent: June 26, 2018Assignee: EPISTAR CORPORATIONInventors: Chih-Chiang Lu, Yi-Chieh Lin, Rong-Ren Lee, Yu-Ren Peng, Ming-Siang Huang, Ming-Ta Chin, Yi-Ching Lee