Patents by Inventor Yi-Chuan Ding
Yi-Chuan Ding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11956897Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.Type: GrantFiled: July 25, 2022Date of Patent: April 9, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ming-Ze Lin, Chia Ching Chen, Yi Chuan Ding
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Publication number: 20230402738Abstract: A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure. The first antenna has a first surface, a second surface opposite the first surface and a third surface extending from the first surface to the second surface, wherein the first surface and the second surface of the first antenna are exposed.Type: ApplicationFiled: August 8, 2023Publication date: December 14, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Guo-Cheng LIAO, Yi Chuan DING
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Patent number: 11721884Abstract: A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure. The first antenna has a first surface, a second surface opposite the first surface and a third surface extending from the first surface to the second surface, wherein the first surface and the second surface of the first antenna are exposed.Type: GrantFiled: April 5, 2021Date of Patent: August 8, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Guo-Cheng Liao, Yi Chuan Ding
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Publication number: 20220361326Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.Type: ApplicationFiled: July 25, 2022Publication date: November 10, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ming-Ze LIN, Chia Ching CHEN, Yi Chuan DING
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Patent number: 11399429Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.Type: GrantFiled: May 29, 2020Date of Patent: July 26, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ming-Ze Lin, Chia Ching Chen, Yi Chuan Ding
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Patent number: 11362049Abstract: A semiconductor device package includes a first surface and a second surface opposite to the first surface. The semiconductor device package further includes a first supporting structure disposed on the first surface of the substrate and a second supporting structure disposed on the first surface of the substrate. The first supporting structure has a first surface spaced apart from the first surface of the substrate by a first distance. The second supporting structure has a first surface spaced apart from the first surface of the substrate by a second distance. The second distance is different from the first distance. The semiconductor device package further includes a first antenna disposed above the first surface of the substrate. The first antenna is supported by the first surface of the first supporting structure and the first surface of the second supporting structure.Type: GrantFiled: December 31, 2019Date of Patent: June 14, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Guo-Cheng Liao, Yi Chuan Ding
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Patent number: 11296001Abstract: A package substrate includes a first dielectric layer, a first patterned conductive layer and a first set of alignment marks. The first patterned conductive layer is disposed on the first dielectric layer. The first set of alignment marks is disposed on the first dielectric layer and adjacent to a first edge of the first dielectric layer. The first set of alignment marks includes a plurality of alignment marks. Distances between the alignment marks of the first set of alignment marks and the first edge are different from each other.Type: GrantFiled: October 3, 2019Date of Patent: April 5, 2022Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Guo-Cheng Liao, Yi Chuan Ding
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Patent number: 11107777Abstract: A substrate structure includes a substrate body, a bottom circuit layer, a first bottom protection structure and a second bottom protection structure. The substrate body has a top surface and a bottom surface opposite to the top surface. The bottom circuit layer is disposed adjacent to the bottom surface of the substrate body, and includes a plurality of pads. The first bottom protection structure is disposed on the bottom surface of the substrate body, and covers a portion of the bottom circuit layer. The second bottom protection structure is disposed on the bottom surface of the substrate body, and covers a portion of the bottom circuit layer. A second thickness of the second bottom protection structure is greater than a first thickness of the first bottom protection structure.Type: GrantFiled: May 22, 2019Date of Patent: August 31, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Guo-Cheng Liao, Yi Chuan Ding
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Publication number: 20210226317Abstract: A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure.Type: ApplicationFiled: April 5, 2021Publication date: July 22, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Guo-Cheng LIAO, Yi Chuan DING
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Publication number: 20210202410Abstract: A semiconductor device package includes a first surface and a second surface opposite to the first surface. The semiconductor device package further includes a first supporting structure disposed on the first surface of the substrate and a second supporting structure disposed on the first surface of the substrate. The first supporting structure has a first surface spaced apart from the first surface of the substrate by a first distance. The second supporting structure has a first surface spaced apart from the first surface of the substrate by a second distance. The second distance is different from the first distance. The semiconductor device package further includes a first antenna disposed above the first surface of the substrate. The first antenna is supported by the first surface of the first supporting structure and the first surface of the second supporting structure.Type: ApplicationFiled: December 31, 2019Publication date: July 1, 2021Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Guo-Cheng LIAO, Yi Chuan DING
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Patent number: 10971798Abstract: A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure. The first antenna has a first surface, a second surface opposite the first surface and a third surface extending from the first surface to the second surface, wherein the first surface and the second surface of the first antenna are exposed.Type: GrantFiled: April 4, 2019Date of Patent: April 6, 2021Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Guo-Cheng Liao, Yi Chuan Ding
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Patent number: 10847470Abstract: A semiconductor package structure includes a first conductive structure, a second conductive structure, a first semiconductor component, a second semiconductor component and a first encapsulant. The first semiconductor component is disposed on the first conductive structure. The first conductive structure includes a first redistribution layer. The second semiconductor component is disposed on the second conductive structure. The second conductive structure includes a second redistribution layer, and the first conductive structure is electrically connected to the second conductive structure. The first encapsulant covers the first semiconductor component and the first conductive structure. A lateral surface of the first conductive structure and a lateral surface of the first encapsulant are non-coplanar.Type: GrantFiled: February 5, 2018Date of Patent: November 24, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Guo-Cheng Liao, Chia Ching Chen, Yi Chuan Ding
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Publication number: 20200296827Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.Type: ApplicationFiled: May 29, 2020Publication date: September 17, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ming-Ze LIN, Chia Ching CHEN, Yi Chuan DING
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Patent number: 10687419Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.Type: GrantFiled: June 13, 2017Date of Patent: June 16, 2020Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ming-Ze Lin, Chia Ching Chen, Yi Chuan Ding
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Publication number: 20200127366Abstract: A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure.Type: ApplicationFiled: April 4, 2019Publication date: April 23, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Guo-Cheng LIAO, Yi Chuan DING
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Publication number: 20200126881Abstract: A package substrate includes a first dielectric layer, a first patterned conductive layer and a first set of alignment marks. The first patterned conductive layer is disposed on the first dielectric layer. The first set of alignment marks is disposed on the first dielectric layer and adjacent to a first edge of the first dielectric layer. The first set of alignment marks includes a plurality of alignment marks. Distances between the alignment marks of the first set of alignment marks and the first edge are different from each other.Type: ApplicationFiled: October 3, 2019Publication date: April 23, 2020Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Guo-Cheng LIAO, Yi Chuan DING
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Publication number: 20190363056Abstract: A substrate structure includes a substrate body, a bottom circuit layer, a first bottom protection structure and a second bottom protection structure. The substrate body has a top surface and a bottom surface opposite to the top surface. The bottom circuit layer is disposed adjacent to the bottom surface of the substrate body, and includes a plurality of pads. The first bottom protection structure is disposed on the bottom surface of the substrate body, and covers a portion of the bottom circuit layer. The second bottom protection structure is disposed on the bottom surface of the substrate body, and covers a portion of the bottom circuit layer. A second thickness of the second bottom protection structure is greater than a first thickness of the first bottom protection structure.Type: ApplicationFiled: May 22, 2019Publication date: November 28, 2019Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Guo-Cheng LIAO, Yi Chuan DING
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Publication number: 20190244907Abstract: A semiconductor package structure includes a first conductive structure, a second conductive structure, a first semiconductor component, a second semiconductor component and a first encapsulant. The first semiconductor component is disposed on the first conductive structure. The first conductive structure includes a first redistribution layer. The second semiconductor component is disposed on the second conductive structure. The second conductive structure includes a second redistribution layer, and the first conductive structure is electrically connected to the second conductive structure. The first encapsulant covers the first semiconductor component and the first conductive structure. A lateral surface of the first conductive structure and a lateral surface of the first encapsulant are non-coplanar.Type: ApplicationFiled: February 5, 2018Publication date: August 8, 2019Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Guo-Cheng LIAO, Chia Ching CHEN, Yi Chuan DING
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Publication number: 20180359853Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.Type: ApplicationFiled: June 13, 2017Publication date: December 13, 2018Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Ming-Ze LIN, Chia Ching CHEN, Yi Chuan DING
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Patent number: 9978705Abstract: A semiconductor package structure includes a substrate, a semiconductor chip, and a solder material. The substrate includes an insulating layer, a conductive circuit layer, and a conductive bump. The conductive circuit layer is recessed from a top surface of the insulating layer. The conductive circuit layer includes a pad, and a side surface of the pad extends along a side surface of the insulating layer. The conductive bump is disposed on the pad. A side surface of the conductive bump, a top surface of the pad and the side surface of the insulating layer together define an accommodating space. A solder material electrically connects the conductive bump and the semiconductor chip. A portion of the solder material is disposed in the accommodating space.Type: GrantFiled: July 28, 2016Date of Patent: May 22, 2018Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Guo-Cheng Liao, Chia-Ching Chen, Yi-Chuan Ding