Patents by Inventor Yi-Chuan Lin
Yi-Chuan Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240122163Abstract: The present invention demonstrated a Cre-loxP based cofilin-1 transgenic animal model to address the pathophysiological role of over-expressed cofilin-1 on systemic development.Type: ApplicationFiled: February 6, 2023Publication date: April 18, 2024Inventors: Yi-Jang LEE, Yu-Chuan LIN, Min-Ying LIN, Bing-Ze LIN, Chia-Yun KANG
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Patent number: 11962847Abstract: A channel hiatus correction method for an HDMI device is provided. A recovery code from scrambled data of the stream is obtained. A liner feedback shift register (LFSR) value of channels of the HDMI port is obtained based on the recovery code and the scrambled data of the stream. The stream is de-scrambled according to the LFSR value of the channels of the HDMI port. Video data is displayed according to the de-scrambled stream.Type: GrantFiled: November 9, 2022Date of Patent: April 16, 2024Assignee: MEDIATEK INC.Inventors: Chia-Hao Chang, You-Tsai Jeng, Kai-Wen Yeh, Yi-Cheng Chen, Te-Chuan Wang, Kai-Wen Cheng, Chin-Lung Lin, Tai-Lai Tung, Ko-Yin Lai
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Patent number: 11956897Abstract: A semiconductor package device includes a first dielectric layer, a first interconnection layer, a second interconnection layer, and a second dielectric layer. The first dielectric layer has a first surface, a second surface opposite to the first surface and a lateral surface extending between the first surface and the second surface. The first interconnection layer is within the first dielectric layer. The second interconnection layer is on the second surface of the first dielectric layer and extends from the second surface of the first dielectric layer into the first dielectric layer to electrically connect to the first interconnection layer. The second dielectric layer covers the second surface and the lateral surface of the first dielectric layer and the second interconnection layer.Type: GrantFiled: July 25, 2022Date of Patent: April 9, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Ming-Ze Lin, Chia Ching Chen, Yi Chuan Ding
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Publication number: 20240097038Abstract: A semiconductor device, including a substrate, a first source/drain region, a second source/drain region, and a gate structure, is provided. The substrate has an extra body portion and a fin protruding from a top surface of the substrate, wherein the fin spans the extra body portion. The first source/drain region and the second source/drain region are in the fin. The gate structure spans the fin, is located above the extra body portion, and is located between the first source/drain region and the second source/drain region.Type: ApplicationFiled: October 13, 2022Publication date: March 21, 2024Applicant: United Microelectronics Corp.Inventors: Yi Chuen Eng, Tzu-Feng Chang, Teng-Chuan Hu, Yi-Wen Chen, Yu-Hsiang Lin
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Patent number: 11921325Abstract: A semiconductor device is provided. The semiconductor device includes a waveguide over a substrate. The semiconductor device includes a first dielectric structure over the substrate, wherein a portion of the waveguide is in the first dielectric structure. The semiconductor device includes a second dielectric structure under the waveguide, wherein a first sidewall of the second dielectric structure is adjacent a first sidewall of the substrate.Type: GrantFiled: February 27, 2020Date of Patent: March 5, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITEDInventors: Yi-Chen Chen, Lee-Chuan Tseng, Shih-Wei Lin
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Patent number: 11764285Abstract: Provided is a method of manufacturing a semiconductor device including: providing a substrate having a memory cell region and a logic region; forming a plurality of stack structures on the substrate in the memory cell region; forming a polysilicon layer to cover the plurality of stack structures and the substrate in the logic region; performing a chemical-mechanical polishing (CMP) process on the polysilicon layer to expose top surfaces of the plurality of stack structures; and after performing the CMP process, patterning the polysilicon layer to form an erase gate between adjacent two stack structures and form a logic gate on the substrate in the logic region, wherein the logic gate has a topmost top surface lower than a topmost top surface of the erase gate.Type: GrantFiled: June 23, 2022Date of Patent: September 19, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Chuan Lin, Chiang-Ming Chuang, Shang-Yen Wu
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Publication number: 20220320315Abstract: Provided is a method of manufacturing a semiconductor device including: providing a substrate having a memory cell region and a logic region; forming a plurality of stack structures on the substrate in the memory cell region; forming a polysilicon layer to cover the plurality of stack structures and the substrate in the logic region; performing a chemical-mechanical polishing (CMP) process on the polysilicon layer to expose top surfaces of the plurality of stack structures; and after performing the CMP process, patterning the polysilicon layer to form an erase gate between adjacent two stack structures and form a logic gate on the substrate in the logic region, wherein the logic gate has a topmost top surface lower than a topmost top surface of the erase gate.Type: ApplicationFiled: June 23, 2022Publication date: October 6, 2022Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Chuan Lin, Chiang-Ming Chuang, Shang-Yen Wu
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Patent number: 11411097Abstract: Provided is a semiconductor device including a substrate, a plurality of memory cells, and at least one dummy gate structure. The substrate has a memory cell region and a dummy region. The memory cells are disposed on the substrate in the memory cell region. Each memory cell includes: adjacent two stack structures disposed on the substrate; two select gates respectively disposed outside the adjacent two stack structures; and an erase gate disposed between the adjacent two stack structures. The erase gate has a step between a topmost top surface and a lowermost top surface of the erase gate. The at least one dummy gate structure is disposed on the substrate in the dummy region.Type: GrantFiled: October 12, 2020Date of Patent: August 9, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Chuan Lin, Chiang-Ming Chuang, Shang-Yen Wu
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Publication number: 20210043752Abstract: Provided is a semiconductor device including a substrate, a plurality of memory cells, and at least one dummy gate structure. The substrate has a memory cell region and a dummy region. The memory cells are disposed on the substrate in the memory cell region. Each memory cell includes: adjacent two stack structures disposed on the substrate; two select gates respectively disposed outside the adjacent two stack structures; and an erase gate disposed between the adjacent two stack structures. The erase gate has a step between a topmost top surface and a lowermost top surface of the erase gate. The at least one dummy gate structure is disposed on the substrate in the dummy region.Type: ApplicationFiled: October 12, 2020Publication date: February 11, 2021Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Chuan Lin, Chiang-Ming Chuang, Shang-Yen Wu
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Patent number: 10825914Abstract: A method of manufacturing a semiconductor device includes following steps. The substrate has a dummy region and a memory cell region. A plurality of first stack structures are formed over the substrate in the memory cell region. At least one second stack structure is formed over the substrate in the dummy region. A conductive layer is formed over the substrate to cover the first stack structures and the at least one second stack structure. A planarization process is performed on the conductive layer to expose top surfaces of the first stack structures and the at least one second stack structure. The conductive layer is patterned to form an erase gate between adjacent two first stack structures, and to form first and second select gates outside the adjacent two first stack structures.Type: GrantFiled: November 5, 2018Date of Patent: November 3, 2020Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Chuan Lin, Chiang-Ming Chuang, Shang-Yen Wu
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Patent number: 10763726Abstract: A wheel rim generator is provided, including: a wheel rim having a rim, a disc, and an axis of rotation; a bearing having an outer race and an inner race, said inner race is disposed around said rim within the rim width; a rotor configured to rotate with said outer race, has at least one permanent magnet, and a center of gravity being displaced from said axis of rotation; and a stator configured to rotate with said rim, form at least one magnetic circuit with said rotor, and generate electromotive force with one of constant and changing magnetic flux in said at least one magnetic circuit as said wheel rim rotates.Type: GrantFiled: October 19, 2016Date of Patent: September 1, 2020Inventor: Yi-Chuan Lin
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Publication number: 20190148513Abstract: A method of manufacturing a semiconductor device includes following steps. The substrate has a dummy region and a memory cell region. A plurality of first stack structures are formed over the substrate in the memory cell region. At least one second stack structure is formed over the substrate in the dummy region. A conductive layer is formed over the substrate to cover the first stack structures and the at least one second stack structure. A planarization process is performed on the conductive layer to expose top surfaces of the first stack structures and the at least one second stack structure. The conductive layer is patterned to form an erase gate between adjacent two first stack structures, and to form first and second select gates outside the adjacent two first stack structures.Type: ApplicationFiled: November 5, 2018Publication date: May 16, 2019Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Yi-Chuan Lin, Chiang-Ming Chuang, Shang-Yen Wu
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Patent number: 10096215Abstract: A non-electrical power operated sensor determining the position and movement of a first object in relation to a second object includes a valve on the first object. The valve has a housing and a cavity. A first sound device is mounted on one side of the housing and connected to the cavity. A second sound device is mounted on the other side of the housing and connected to the cavity. A piston connects the second object and the valve. The piston includes a push rod extending from one side of the plug body and the push rod being moved one way or another way causes one sound or another sound to be made. The disclosure also provides a monitoring system listening for the one sound or for the other sound, the system being able to instantly communicate with an electronic device of a user.Type: GrantFiled: June 20, 2017Date of Patent: October 9, 2018Assignee: AMBIT MICROSYSTEMS (SHANGHAI) LTD.Inventors: Yi-Chuan Lin, Yu-Hu Yan
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Publication number: 20180286193Abstract: A non-electrical power operated sensor determining the position and movement of a first object in relation to a second object includes a valve on the first object. The valve has a housing and a cavity. A first sound device is mounted on one side of the housing and connected to the cavity. A second sound device is mounted on the other side of the housing and connected to the cavity. A piston connects the second object and the valve. The piston includes a push rod extending from one side of the plug body and the push rod being moved one way or another way causes one sound or another sound to be made. The disclosure also provides a monitoring system listening for the one sound or for the other sound, the system being able to instantly communicate with an electronic device of a user.Type: ApplicationFiled: June 20, 2017Publication date: October 4, 2018Inventors: YI-CHUAN LIN, YU-HU YAN
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Patent number: 9815344Abstract: A tire sensing system of kinetic parameters is provided, including: at least one wave-emitting source configured to rotate with a tire, and emit at least one detection wave towards an internal surface of said tire; at least one wave sensor configured to rotate with said at least one wave-emitting source, and output a measurement signal according to a physical parameter of said at least one detection wave being reflected off said internal surface; and a processing unit configured to receive said measurement signal, record at least two instants in time during which said at least one detection wave sweeps across the footprint of said tire, and compute a kinetic parameter of said tire with said at least two instants.Type: GrantFiled: October 12, 2016Date of Patent: November 14, 2017Inventor: Yi-Chuan Lin
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Patent number: 9787115Abstract: A universal serial bus (USB) adaptor supplies a large charging current to charge a device. The USB adaptor includes a voltage conversion circuit, a USB interface, a current detection circuit, a first switch, a second switch, and a third switch. The USB interface includes a power pin, a first data pin, a second data pin, and a ground pin. The current detection circuit detects a charging current of the device, and converts the charging current into a voltage to compare the charging current with a reference voltage to output a comparison signal. The first switch, the second switch, and the third switch control connection relationships between the power pin and the first data pin, the first data pin and the second data pin, and the second data pin and the ground pin according to the comparison signal, respectively. A USB cable is also provided.Type: GrantFiled: September 15, 2014Date of Patent: October 10, 2017Assignee: HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Yi-Chuan Lin, Yu-Hu Yan
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Publication number: 20170117774Abstract: A wheel rim generator is provided, including: a wheel rim having a rim, a disc, and an axis of rotation; a bearing having an outer race and an inner race, said inner race is disposed around said rim within the rim width; a rotor configured to rotate with said outer race, has at least one permanent magnet, and a center of gravity being displaced from said axis of rotation; and a stator configured to rotate with said rim, form at least one magnetic circuit with said rotor, and generate electromotive force with one of constant and changing magnetic flux in said at least one magnetic circuit as said wheel rim rotates.Type: ApplicationFiled: October 19, 2016Publication date: April 27, 2017Inventor: YI-CHUAN LIN
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Publication number: 20170106707Abstract: A tire sensing system of kinetic parameters is provided, including: at least one wave-emitting source configured to rotate with a tire, and emit at least one detection wave towards an internal surface of said tire; at least one wave sensor configured to rotate with said at least one wave-emitting source, and output a measurement signal according to a physical parameter of said at least one detection wave being reflected off said internal surface; and a processing unit configured to receive said measurement signal, record at least two instants in time during which said at least one detection wave sweeps across the footprint of said tire, and compute a kinetic parameter of said tire with said at least two instants.Type: ApplicationFiled: October 12, 2016Publication date: April 20, 2017Inventor: YI-CHUAN LIN
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Publication number: 20150303724Abstract: A universal serial bus (USB) adaptor supplies a large charging current to charge a device. The USB adaptor includes a voltage conversion circuit, a USB interface, a current detection circuit, a first switch, a second switch, and a third switch. The USB interface includes a power pin, a first data pin, a second data pin, and a ground pin. The current detection circuit detects a charging current of the device, and converts the charging current into a voltage to compare the charging current with a reference voltage to output a comparison signal. The first switch, the second switch, and the third switch control connection relationships between the power pin and the first data pin, the first data pin and the second data pin, and the second data pin and the ground pin according to the comparison signal, respectively. A USB cable is also provided.Type: ApplicationFiled: September 15, 2014Publication date: October 22, 2015Inventors: YI-CHUAN LIN, YU-HU YAN
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Publication number: 20150216784Abstract: A cosmetic composition containing fragments of bacterial cellulose film is provided. The addition of the fragments of bacterial cellulose film in a cosmetic composition not only improves the transdermal transmission of active ingredients contained in the cosmetic composition but also provides the functions of skin moisturization, skin exfoliation and sebum absorption. Various applications of bacterial cellulose film are thus provided.Type: ApplicationFiled: February 5, 2015Publication date: August 6, 2015Applicant: NYMPHEAS INTERNATIONAL CORP.Inventors: YI-CHUAN LIN, YUH-CHYUN WEY, MEI-LING LEE, PIN-CHIH LIN