Patents by Inventor Yi-Chun HSIEH

Yi-Chun HSIEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955154
    Abstract: A sense amplifier circuit includes a sense amplifier, a switch and a temperature compensation circuit. The temperature compensation circuit provides a control signal having a positive temperature coefficient, based on which the switch provides reference impedance for temperature compensation. The sense amplifier includes a first input end coupled to a target bit and a second input end coupled to the switch. The sense amplifier outputs a sense amplifier signal based on the reference impedance and the impedance of the target bit.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Cheng-Tung Huang, Jen-Yu Wang, Po-Chun Yang, Yi-Ting Wu, Yung-Ching Hsieh, Jian-Jhong Chen, Chia-Wei Lee
  • Patent number: 11942130
    Abstract: A bottom-pinned spin-orbit torque magnetic random access memory (SOT-MRAM) is provided in the present invention, including a substrate, a bottom electrode layer on the substrate, a magnetic tunnel junction (MTJ) on the bottom electrode layer, a spin-orbit torque (SOT) layer on the MTJ, a capping layer on the SOT layer, and an injection layer on the capping layer, wherein the injection layer is divided into individual first part and second part, and the first part and the second part are connected respectively with two ends of the capping layer.
    Type: Grant
    Filed: March 23, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Jian-Jhong Chen, Yi-Ting Wu, Jen-Yu Wang, Cheng-Tung Huang, Po-Chun Yang, Yung-Ching Hsieh
  • Publication number: 20230342365
    Abstract: A user preference hierarchy is determined from user response to images. Images may be tagged using machine learning models trained to determine values for images. Products are clustered according to product vectors. Images of products within a cluster are clustered according to composition and groups of images are selected from image clusters for soliciting feedback regarding user preference for products of a cluster. Feedback is used to train a user preference model to estimate affinity for a product vector. A user may provide feedback regarding a price point and products are weighted according to a distribution about the price point. The distribution may be asymmetrical according to direction of movement of the price point. Filters may be dynamically defined and presented to a user based on popularity and frequency of occurrence of attribute-value pairs of search results and based on feedback regarding the search results.
    Type: Application
    Filed: June 26, 2023
    Publication date: October 26, 2023
    Applicant: The Yes Platform, Inc.
    Inventors: Navin Agarwal, Judy Yi-Chun Hsieh, Debbie Ayano Limongan, Lianghao Chen, Amit Aggarwal, Julie Bornstein
  • Publication number: 20230291398
    Abstract: The present disclosure provides a signal converting circuit including a phase interpolator circuit and a bias voltage generation circuit. The phase interpolator circuit is configured to convert multiple input clock signals into an output clock signal according to a digital signal. The bias voltage generation circuit is electrically coupled to the phase interpolator circuit, is configured to generate a bias voltage according to reference information and is configured to output the bias voltage to the phase interpolator circuit, so that the output clock signal has a predetermined phase corresponding to one of multiple bit configurations of the digital signal. The reference information is relevant to a change of the phase interpolator circuit due to a manufacture process variation.
    Type: Application
    Filed: February 24, 2023
    Publication date: September 14, 2023
    Inventors: Chien-Tsu YEH, Hsi-En LIU, Yi-Chun HSIEH
  • Publication number: 20230291397
    Abstract: A signal converting circuit includes a phase interpolator circuit and a bias voltage generation circuit. The phase interpolator circuit is configured to convert a plurality of input clock signals into an output clock signal according to a digital signal. The bias voltage generation circuit is electrically coupled to the phase interpolator circuit, is configured to generate a bias voltage according to a reference information and is configured to output the bias voltage to the phase interpolator circuit, so that the output clock signal has a predetermined phase corresponding to one of a plurality of bit configurations of the digital signal, wherein the reference information is relevant to a change of the phase interpolator circuit due to a temperature variation.
    Type: Application
    Filed: February 24, 2023
    Publication date: September 14, 2023
    Inventors: Chien-Tsu YEH, Hsi-En LIU, Yi-Chun HSIEH
  • Patent number: 11727014
    Abstract: A user preference hierarchy is determined from user response to images. Images may be tagged using machine learning models trained to determine values for images. Products are clustered according to product vectors. Images of products within a cluster are clustered according to composition and groups of images are selected from image clusters for soliciting feedback regarding user preference for products of a cluster. Feedback is used to train a user preference model to estimate affinity for a product vector. A user may provide feedback regarding a price point and products are weighted according to a distribution about the price point. The distribution may be asymmetrical according to direction of movement of the price point. Filters may be dynamically defined and presented to a user based on popularity and frequency of occurrence of attribute-value pairs of search results and based on feedback regarding the search results.
    Type: Grant
    Filed: December 12, 2019
    Date of Patent: August 15, 2023
    Assignee: The Yes Platform, Inc.
    Inventors: Navin Agarwal, Judy Yi-Chun Hsieh, Debbie Ayano Limongan, Lianghao Chen, Amit Aggarwal, Julie Bornstein
  • Patent number: 11671236
    Abstract: The present invention provides a receiver including a sampling circuit, a data sampling point selection circuit and a determination circuit. The sampling circuit is configured to use a clock signal to sample an input signal to generate a sampled signal, wherein a frequency of the clock signal is greater than a frequency of the input signal. The data sampling point selection circuit is configured to filter start point data to generate a filtered start point data, and to generate a data sampling point by adding an offset to the filtered start point data, wherein the start point data corresponds to a time point that a sampled value of sampled signal starts to change. The determination circuit is configured to refer to a sampled value corresponding to the data sampling point in the sampled signal to determine a logical value of a digital output signal corresponding to the input signal.
    Type: Grant
    Filed: November 10, 2021
    Date of Patent: June 6, 2023
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yi-Chun Hsieh, Yi-Chun Hsieh, Pei-Tse Chiang, Chih-Kai Chien
  • Publication number: 20220231828
    Abstract: The present invention provides a receiver including a sampling circuit, a data sampling point selection circuit and a determination circuit. The sampling circuit is configured to use a clock signal to sample an input signal to generate a sampled signal, wherein a frequency of the clock signal is greater than a frequency of the input signal. The data sampling point selection circuit is configured to filter start point data to generate a filtered start point data, and to generate a data sampling point by adding an offset to the filtered start point data, wherein the start point data corresponds to a time point that a sampled value of sampled signal starts to change. The determination circuit is configured to refer to a sampled value corresponding to the data sampling point in the sampled signal to determine a logical value of a digital output signal corresponding to the input signal.
    Type: Application
    Filed: November 10, 2021
    Publication date: July 21, 2022
    Applicant: Realtek Semiconductor Corp.
    Inventors: Yi-Chun Hsieh, Yi-Chun Hsieh, Pei-Tse Chiang, Chih-Kai Chien
  • Patent number: 11386301
    Abstract: Images are tagged with values in an image data hierarchy that is most subjective at its top level and least subjective at its bottom level, such as a hierarchy including style, type, and features for clothing. A user preference hierarchy is determined from user response to images that are tagged. Tagged images may be generated by processing them with machine learning models trained to determine values for images. Product records including images and other data are analyzed to generate attribute vectors that are encoded to generate product vectors. Products are clustered according to their product vectors. Images of products within a cluster are clustered according to composition and groups of images are selected from image clusters for soliciting feedback regarding user preference for products of a cluster. Feedback is used to train a user preference model to estimate user affinity for a product having a given product vector.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: July 12, 2022
    Assignee: The Yes Platform
    Inventors: Amit Aggarwal, Navin Agarwal, Judy Yi-Chun Hsieh, Lianghao Chen, Preetam Amancharla, Julie Bornstein
  • Patent number: 11196389
    Abstract: A variable gain amplifier device includes a variable gain amplifier circuitry and a control voltage generating circuitry. The variable gain amplifier circuitry is configured to amplify input signals to generate output signals, wherein the variable gain amplifier circuitry includes a gain setting circuit that is configured to set a gain of the variable gain amplifier circuitry according to a control voltage. The control voltage generation circuitry is configured to simulate at least one circuit portion of the variable gain amplifier circuitry, in order to generate the control voltage according to the input signals and a setting voltage.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: December 7, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventor: Yi-Chun Hsieh
  • Patent number: 11050396
    Abstract: An amplifier circuit is provided, which includes an input stage circuit, at least one impedance component and a current supply circuit, where the input stage circuit is coupled between at least one input terminal of the amplifier circuit and at least one output terminal of the amplifier circuit, the impedance component is coupled between a first reference voltage and the output terminal, and the current supply circuit is coupled between a second reference voltage and the output terminal. The input stage circuit is arranged to generate a signal current in response to an input signal on the input terminal, and the current supply circuit is arranged to provide at least one adjustment current. In addition, a common mode voltage level of an output signal on the output terminal is controlled by the adjustment current, to allow the amplifier circuit to perform low voltage operations.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: June 29, 2021
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yu-Ting Chung, Shawn Min, Yi-Chun Hsieh
  • Publication number: 20210182287
    Abstract: A user preference hierarchy is determined from user response to images. Images may be tagged using machine learning models trained to determine values for images. Products are clustered according to product vectors. Images of products within a cluster are clustered according to composition and groups of images are selected from image clusters for soliciting feedback regarding user preference for products of a cluster. Feedback is used to train a user preference model to estimate affinity for a product vector. A user may provide feedback regarding a price point and products are weighted according to a distribution about the price point. The distribution may be asymmetrical according to direction of movement of the price point. Filters may be dynamically defined and presented to a user based on popularity and frequency of occurrence of attribute-value pairs of search results and based on feedback regarding the search results.
    Type: Application
    Filed: December 12, 2019
    Publication date: June 17, 2021
    Inventors: Navin Agarwal, Judy Yi-Chun Hsieh, Debbie Ayano Limongan, Lianghao Chen, Amit Aggarwal, Julie Bornstein
  • Publication number: 20210118020
    Abstract: A user preference hierarchy is determined from user response to images that are tagged. Tagged images may be generated by processing them with machine learning models trained to determine values for images. Product records including images and other data are analyzed to generate attribute vectors that are encoded to generate product vectors. Products are clustered according to their product vectors. Images of products within a cluster are clustered according to composition and groups of images are selected from image clusters for soliciting feedback regarding user preference for products of a cluster. Feedback is used to train a user preference model to estimate affinity for a product having a given product vector. A user may provide feedback regarding a price point and products are weighted according to a distribution having a highest value at the price point. The distribution may be asymmetrical according to direction of movement of the price point.
    Type: Application
    Filed: October 21, 2019
    Publication date: April 22, 2021
    Inventors: Navin Agarwal, Amit Aggarwal, Judy Yi-Chun Hsieh, Julie Bornstein, Erika Cary, Annisa Karaca
  • Publication number: 20210073593
    Abstract: Images are tagged with values in an image data hierarchy that is most subjective at its top level and least subjective at its bottom level, such as a hierarchy including style, type, and features for clothing. A user preference hierarchy is determined from user response to images that are tagged. Tagged images may be generated by processing them with machine learning models trained to determine values for images. Product records including images and other data are analyzed to generate attribute vectors that are encoded to generate product vectors. Products are clustered according to their product vectors. Images of products within a cluster are clustered according to composition and groups of images are selected from image clusters for soliciting feedback regarding user preference for products of a cluster. Feedback is used to train a user preference model to estimate user affinity for a product having a given product vector.
    Type: Application
    Filed: September 6, 2019
    Publication date: March 11, 2021
    Inventors: Amit Aggarwal, Navin Agarwal, Judy Yi-Chun Hsieh, Lianghao Chen, Preetam Amancharla, Julie Bornstein
  • Publication number: 20200403579
    Abstract: A variable gain amplifier device includes a variable gain amplifier circuitry and a control voltage generating circuitry. The variable gain amplifier circuitry is configured to amplify input signals to generate output signals, wherein the variable gain amplifier circuitry includes a gain setting circuit that is configured to set a gain of the variable gain amplifier circuitry according to a control voltage. The control voltage generation circuitry is configured to simulate at least one circuit portion of the variable gain amplifier circuitry, in order to generate the control voltage according to the input signals and a setting voltage.
    Type: Application
    Filed: February 28, 2020
    Publication date: December 24, 2020
    Inventor: Yi-Chun HSIEH
  • Publication number: 20200287508
    Abstract: An amplifier circuit is provided, which includes an input stage circuit, at least one impedance component and a current supply circuit, where the input stage circuit is coupled between at least one input terminal of the amplifier circuit and at least one output terminal of the amplifier circuit, the impedance component is coupled between a first reference voltage and the output terminal, and the current supply circuit is coupled between a second reference voltage and the output terminal. The input stage circuit is arranged to generate a signal current in response to an input signal on the input terminal, and the current supply circuit is arranged to provide at least one adjustment current. In addition, a common mode voltage level of an output signal on the output terminal is controlled by the adjustment current, to allow the amplifier circuit to perform low voltage operations.
    Type: Application
    Filed: July 23, 2019
    Publication date: September 10, 2020
    Inventors: Yu-Ting Chung, Shawn Min, Yi-Chun Hsieh
  • Patent number: 10721102
    Abstract: A communication apparatus includes an input terminal, an output terminal, and an interference reduction circuit. The interference reduction circuit is coupled between the input terminal and the output terminal. The interference reduction circuit receives a time-varying data signal. The interference reduction circuit acquires first partial data from the data signal at a first time, and generates a first level-shifted result and a second level-shifted result according to the first partial data. The interference reduction circuit is further configured to acquire second partial data from the data signal at a second time. The interference reduction circuit selects one of the first level-shifted result and the second level-shifted result as a selected result according to the second partial data, and sends the selected result to the output terminal.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: July 21, 2020
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Kai-An Hsieh, Yi-Chun Hsieh
  • Patent number: 10715359
    Abstract: The present invention provides a decision feedback equalizer including a first path and a second path. The first path includes a first sampling circuit and a first latch circuit, wherein the first sampling circuit generates a first set signal and a first reset signal according to an input signal, a second set signal and a second reset signal, and the first latch circuit generates a first digital signal according to the first set signal and the first reset signal. The second path includes a second sampling circuit and a second latch circuit, wherein the second sampling circuit generates the second set signal and the second reset signal according to the input signal, the first set signal and the first reset signal, and the second latch circuit generates a second digital signal according to the second set signal and the second reset signal.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: July 14, 2020
    Assignee: Realtek Semiconductor Corp.
    Inventors: Hsi-En Liu, Shawn Min, Yi-Chun Hsieh
  • Patent number: 10305625
    Abstract: A data recovery circuit includes: a first comparison circuit for comparing two analog data signals to output a first and a second comparison signals having opposite logic values when a positive clock signal stays at an active level, and for configuring the first and second comparison signals to have a same logic value when the positive clock signal stays at an inactive level; a second comparison circuit for comparing the two analog data signals to output a third and a fourth comparison signals having opposite logic values when a negative clock signal stays at the active level, and for configuring the third and fourth comparison signals to have the same logic value when the negative clock signal stays at the inactive level; and a data signal generating circuit for generating a digital data signal according to the first through fourth comparison signals.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: May 28, 2019
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventor: Yi-Chun Hsieh
  • Publication number: 20190068412
    Abstract: A communication apparatus includes an input terminal, an output terminal, and an interference reduction circuit. The interference reduction circuit is coupled between the input terminal and the output terminal. The interference reduction circuit receives a time-varying data signal. The interference reduction circuit acquires first partial data from the data signal at a first time, and generates a first level-shifted result and a second level-shifted result according to the first partial data. The interference reduction circuit is further configured to acquire second partial data from the data signal at a second time. The interference reduction circuit selects one of the first level-shifted result and the second level-shifted result as a selected result according to the second partial data, and sends the selected result to the output terminal.
    Type: Application
    Filed: July 24, 2018
    Publication date: February 28, 2019
    Inventors: Kai-An HSIEH, Yi-Chun Hsieh