Patents by Inventor Yi-Chun Teng

Yi-Chun Teng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11616069
    Abstract: The present application discloses a semiconductor structure and a manufacturing method thereof. The semiconductor structure comprises a substrate, a gate dielectric layer, a floating gate, a first dielectric layer and a control gate. The gate dielectric layer is disposed on the substrate. The floating gate is disposed on the gate dielectric layer and has at least one tip on a top surface of the floating gate. The first dielectric layer is disposed on the floating gate. The control gate is disposed above the first dielectric layer and at least partially overlaps the floating gate.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: March 28, 2023
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ping-Chia Shih, Kuei-Ya Chuang, Chuang-Hsin Chueh, Ming-Che Tsai, Wen-Lin Wang, Yi-Chun Teng, Ssu-Yin Liu, Wan-Chun Liao
  • Patent number: 11282799
    Abstract: A device for generating a security key includes a substrate, semiconductor units, contact structures, and defects. The semiconductor units are disposed on the substrate. The contact structures are disposed on and connected with the semiconductor units. The defects are disposed in at least a part of the contact structures randomly. A manufacturing method of a device for generating a security key includes the following steps. First semiconductor units are formed on a substrate. First contact structures are formed on the first semiconductor units. The first contact structures are connected with the first semiconductor units, and defects are formed in at least a part of the first contact structures randomly.
    Type: Grant
    Filed: January 14, 2020
    Date of Patent: March 22, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wen-Lin Wang, Ping-Chia Shih, Ming-Che Tsai, Kuei-Ya Chuang, Yi-Chun Teng, Po-Hsien Chen, Wan-Chun Liao
  • Publication number: 20220077166
    Abstract: The present application discloses a semiconductor structure and a manufacturing method thereof. The semiconductor structure comprises a substrate, a gate dielectric layer, a floating gate, a first dielectric layer and a control gate. The gate dielectric layer is disposed on the substrate. The floating gate is disposed on the gate dielectric layer and has at least one tip on a top surface of the floating gate. The first dielectric layer is disposed on the floating gate. The control gate is disposed above the first dielectric layer and at least partially overlaps the floating gate.
    Type: Application
    Filed: October 19, 2020
    Publication date: March 10, 2022
    Inventors: Ping-Chia SHIH, Kuei-Ya CHUANG, Chuang-Hsin CHUEH, Ming-Che TSAI, Wen-Lin WANG, Yi-Chun TENG, Ssu-Yin LIU, Wan-Chun LIAO
  • Publication number: 20210217708
    Abstract: A device for generating a security key includes a substrate, semiconductor units, contact structures, and defects. The semiconductor units are disposed on the substrate. The contact structures are disposed on and connected with the semiconductor units. The defects are disposed in at least a part of the contact structures randomly. A manufacturing method of a device for generating a security key includes the following steps. First semiconductor units are formed on a substrate. First contact structures are formed on the first semiconductor units. The first contact structures are connected with the first semiconductor units, and defects are formed in at least a part of the first contact structures randomly.
    Type: Application
    Filed: January 14, 2020
    Publication date: July 15, 2021
    Inventors: Wen-Lin Wang, Ping-Chia Shih, Ming-Che Tsai, Kuei-Ya Chuang, Yi-Chun Teng, Po-Hsien Chen, Wan-Chun Liao