Abstract: In a method of manufacturing a semiconductor device, a mask pattern is formed over a target layer to be etched, and the target layer is etched by using the mask pattern as an etching mask. The etching is performed by using an electron cyclotron resonance (ECR) plasma etching apparatus, the ECR plasma etching apparatus includes one or more coils, and a plasma condition of the ECR plasma etching is changed during the etching the target layer by changing an input current to the one or more coils.

Abstract: A semiconductor device includes a first channel region, a second channel region, and a first insulating fin, the first insulating fin being interposed between the first channel region and the second channel region. The first insulating fin includes a lower portion and an upper portion. The lower portion includes a fill material. The upper portion includes a first dielectric layer on the lower portion, the first dielectric layer being a first dielectric material, a first capping layer on the first dielectric layer, the first capping layer being a second dielectric material, the second dielectric material being different than the first dielectric material, and a second dielectric layer on the first capping layer, the second dielectric layer being the first dielectric material.

Abstract: A semiconductor device includes a substrate, a semiconductor fin protruding from the substrate, an isolation layer disposed above the substrate, a dielectric fin with a bottom portion embedded in the isolation layer, and a gate structure over top and sidewall surfaces of the semiconductor fin and the dielectric fin. The semiconductor fin has a first sidewall and a second sidewall facing away from the first sidewall. The isolation layer includes a first portion disposed on the first sidewall of the semiconductor fin and a second portion disposed on the second sidewall of the semiconductor fin. A top portion of the dielectric fin includes an air pocket with a top opening sealed by the gate structure.

Abstract: In some embodiments, the present disclosure relates to a memory device including a semiconductor substrate, a first electrode disposed over the semiconductor substrate, a ferroelectric layer disposed between the first electrode and the semiconductor substrate, and a first stressor layer separating the first electrode from the ferroelectric layer. The first stressor layer has a coefficient of thermal expansion greater than that of the ferroelectric layer.

Abstract: A flash memory device and method of making the same are disclosed. The flash memory device is located on a substrate and includes a floating gate electrode, a tunnel dielectric layer located between the substrate and the floating gate electrode, a smaller length control gate electrode and a control gate dielectric layer located between the floating gate electrode and the smaller length control gate electrode. The length of a major axis of the smaller length control gate electrode is less than a length of a major axis of the floating gate electrode.

Abstract: In an embodiment, a device includes: lower semiconductor nanostructures including a first semiconductor material; a lower epitaxial source/drain region adjacent the lower semiconductor nanostructures, the lower epitaxial source/drain region having a first conductivity type; upper semiconductor nanostructures including a second semiconductor material, the second semiconductor material different from the first semiconductor material; and an upper epitaxial source/drain region adjacent the upper semiconductor nanostructures, the upper epitaxial source/drain region having a second conductivity type, the second conductivity type being opposite the first conductivity type.

Abstract: A carrier is provided for a hard drive. The carrier includes a housing that receives a hard drive and a security chip. A locking component secures the hard drive within the housing. Securing the locking component prevents the hard drive from being removed from the housing. A release mechanism releases the locking component. A breaking component is in communication with the release mechanism such that upon actuation of the release mechanism to release the locking component, the breaking component breaks the security chip for the hard drive.

Abstract: A pet stroller with an adjustable structure of strut and canopy includes a pet stroller body, an adjustable supporting frame and an adjustable canopy. The adjustable supporting frame includes two rotation shaft boxes respectively arranged on the inner sides of the folding brace of the two sides of the pet stroller body. Each rotation shaft box includes a canopy strut extended diagonally upwards from the front end thereof and a front window strut extended forward parallelly from the front end thereof. The adjustable canopy covers on the external side of the pet stroller body and corresponds to the adjustable supporting frame, so as to allow the adjustable canopy to be transformed among a covering mode, a front opening mode, and a full-opening mode through adjusting the positions of the canopy strut and the front window strut.

Abstract: A method for behavior rewarding is applied in a rewarding system, which comprises a computer device and a server. The computer device is configured for a user to execute a designated action and communicates with the server. The method comprises the following steps: receiving an execution request of a plurality of designated actions by the computer device, wherein the designated actions at least comprises a special action or a random action; transmitting an execution result of the designated actions from the computer device to the server; and, when determining that the execution result of the designated actions matches the execution request of the designated actions, transmitting a rewarding value corresponding to the designated actions from the server to the computer device. A server and a computer device for executing the method for behavior rewarding are also disclosed.

Abstract: A method for distributing a reward value includes the following steps of: getting a consumption amount spent in a second store by a member of a first store; calculating a reward value by multiplicating a preset ratio with the consumption amount; randomly distributing the reward value into at least two parts of the reward value; and transmitting one of the parts of the reward value to an account of the member. A member computer device applied to the method is also disclosed.

Abstract: A trade reward method includes the following steps of: getting a consumption amount spent in a second store by a member of a first store; calculating a reward value by multiplicating a preset ratio with the consumption amount; and transferring a first part of the reward value to an account of the first store. A server and a store computer device applied with the trade reward method are also provided.

Abstract: A pet stroller with an adjustable structure of strut and canopy includes a pet stroller body, an adjustable supporting frame and an adjustable canopy. The adjustable supporting frame includes two rotation shaft boxes respectively arranged on the inner sides of the folding brace of the two sides of the pet stroller body. Each rotation shaft box includes a canopy strut extended diagonally upwards from the front end thereof and a front window strut extended forward parallelly from the front end thereof. The adjustable canopy covers on the external side of the pet stroller body and corresponds to the adjustable supporting frame, so as to allow the adjustable canopy to be transformed among a covering mode, a front opening mode, and a full-opening mode through adjusting the positions of the canopy strut and the front window strut.

Abstract: Provided is a semiconductor device having dual channels including a first portion and a second portion sharing a buried gate pillar. The buried gate pillar extends from a first surface of a substrate toward a second surface opposite to the first surface. The first portion includes the buried gate pillar, a first gate dielectric layer at a first sidewall of the buried gate pillar and a first doped region set aside the first gate dielectric layer. A first channel is provided in the substrate between the first gate dielectric layer and the first doped region set. The second portion includes the buried gate pillar, a second gate dielectric layer at a second sidewall of the buried gate pillar and a second doped region set aside the second gate dielectric layer. A second channel is provided in the substrate between the second gate dielectric layer and the second doped region set.

Abstract: Provided is a semiconductor device having dual channels including a first portion and a second portion sharing a buried gate pillar. The buried gate pillar extends from a first surface of a substrate toward a second surface opposite to the first surface. The first portion includes the buried gate pillar, a first gate dielectric layer at a first sidewall of the buried gate pillar and a first doped region set aside the first gate dielectric layer. A first channel is provided in the substrate between the first gate dielectric layer and the first doped region set. The second portion includes the buried gate pillar, a second gate dielectric layer at a second sidewall of the buried gate pillar and a second doped region set aside the second gate dielectric layer. A second channel is provided in the substrate between the second gate dielectric layer and the second doped region set.

Abstract: A method of semiconductor processing comprises providing a semiconductor wafer in a processing chamber; feeding at least one tungsten-containing precursor in a gas state into the processing chamber for atomic layer deposition (ALD) of tungsten; feeding at least one reducing chemical in a gas state into the processing chamber; and monitoring a concentration of at least one gaseous byproduct in the chamber; and providing a signal indicating concentration of the at least one gaseous byproduct in the chamber. The byproduct is produced by a reaction between the at least one tungsten-containing precursor and the at least one reducing chemical during the ALD.

Abstract: A method of semiconductor processing comprises providing a semiconductor wafer in a processing chamber; feeding at least one tungsten-containing precursor in a gas state into the processing chamber for atomic layer deposition (ALD) of tungsten; feeding at least one reducing chemical in a gas state into the processing chamber; and monitoring a concentration of at least one gaseous byproduct in the chamber; and providing a signal indicating concentration of the at least one gaseous byproduct in the chamber. The byproduct is produced by a reaction between the at least one tungsten-containing precursor and the at least one reducing chemical during the ALD.

Abstract: A multi-stationed continuous electro-polishing system includes an electrolysis tank, a driving mechanism, electrode plates and a power supply. The electrolysis tank is filled with electrolyzing liquid. The driving mechanism is placed in the electrolysis tank for driving a metal strip into and out of the electrolysis tank. Each of the electrode plates is placed at an adjustable gap from the metal strip in the electrolysis tank. The power supply includes a positive electrode connected to the metal strip and a negative electrode connected to all of the electrode plates.

Abstract: The present invention relates to an error-tolerant language understanding, system and method. The system and the method is using example sentences to provide the clues for detecting and recovering errors. The procedure of detection and recovery is guided by a probabilistic scoring function which integrated the scores from the speech recognizer, concept parser, the scores of concept-bigram and edit operations, such as deleting, inserting and substituting concepts. Meanwhile, the score of edit operations refers the confidence measure achieving more precise detection and recovery of the speech recognition errors. That said, a concept with lower confidence measure tends to be deleted or substituted, while a concept with higher one tends to be retained.

Abstract: A method for named-entity (NE) recognition and verification is provided. The method can extract at least one to-be-tested segments from an article according to a text window, and use a predefined grammar to parse the at least one to-be-tested segments to remove ill-formed ones. Then, a statistical verification model is used to calculate the confidence measurement of each to-be-tested segment to determine where the to-be-tested segment has a named-entity or not. If the confidence measurement is less than a predefined threshold, the to-be-tested segment will be rejected. Otherwise, it will be accepted.

Abstract: The present invention relates to an example-based concept-orietned data extraction method. In an example labeling phase, the exemplary data string is converted into an exemplary token sequence, in which the target concepts and filler concepts are labeled to be tuples for use as an example, and thus an exemplary concept graph is constructed. In the data extraction phase, the untested data string is converted into an untested token sequence to be processed, and, based on the associated concept recognizers defined by the tuples in the example labeling phase, it is able to detect the concept candidates and establish the composite concepts and aggregate concepts, thereby constructing a hypothetical concept graph. After comparing the exemplary concept graph with the hypothetical concept graph, the optimal hypothetical concept sequence in the hypothetical graph is determined, so as to extract the targeted data from the matched target concepts.