Patents by Inventor Yi Edward Chang

Yi Edward Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for forming required pattern on semiconductor substrate by thermal reflow technique
    Publication number: 20100159708
    Abstract: The invention is disclosed that pattern on semiconductor substrate is fabricated by thermal reflow technique. Also, the pattern on semiconductor substrate having different sub-micron spacings can be fabricated by using different time for the thermal reflow technique process.
    Type: Application
    Filed: April 10, 2009
    Publication date: June 24, 2010
    Applicant: National Chiao Tung University
    Inventors: Yi Edward Chang, Chia-Ta Chang, Shih-Kuang Hsiao
  • Method for forming a semiconductor structure having nanometer line-width
    Patent number: 7501348
    Abstract: A method for forming a semiconductor structure having a deep sub-micron or nano scale line-width is disclosed. Structure consisting of multiple photoresist layers is first formed on the substrate, then patterned using adequate exposure energy and development condition so that the bottom photoresist layer is not developed while the first under-cut resist groove is formed on top of the bottom photoresist layer. Anisotropic etching is then performed at a proper angle to the normal of the substrate surface, and a second resist groove is formed by the anisotropic etching. Finally, the metal evaporation process and the lift-off process are carried out and the ?-shaped metal gate with nano scale line-width can be formed.
    Type: Grant
    Filed: April 10, 2007
    Date of Patent: March 10, 2009
    Assignee: National Chiao Tung University
    Inventors: Szu-Hung Chen, Yi-Chung Lien, Yi Edward Chang