Patents by Inventor Yi Elyn Xu

Yi Elyn Xu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multi-die, vertical-wire package-in-package apparatus, and methods of making same
    Patent number: 11749653
    Abstract: A vertical-wire package-in-package includes at least two memory-die stacks that form respective memory modules that are stacked vertically on a bond-wire board. Each memory die in the memory-die stack includes a vertical bond wire that emerges from a matrix for connection. The matrix encloses the memory-die stack, the spacer, and a redistribution layer. At least two memory modules are assembled in a vertical-wire package-in-package.
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: September 5, 2023
    Assignee: Intel Corporation
    Inventors: Hyoung Il Kim, Florence R. Pon, Yi Elyn Xu
  • Embedded component and methods of making the same
    Patent number: 11710674
    Abstract: Various embodiments disclosed relate to a substrate for a semiconductor device. The substrate includes a first major surface and a second major surface opposite the first major surface. The substrate further includes a cavity defined by a portion of the first major surface. The cavity includes a bottom dielectric surface and a plurality of sidewalls extending from the bottom surface to the first major surface. A first portion of a first sidewall includes a conductive material.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: July 25, 2023
    Assignee: Intel Corporation
    Inventors: Yi Elyn Xu, Bilal Khalaf, Dennis Sean Carr
  • EMBEDDED COMPONENT AND METHODS OF MAKING THE SAME
    Publication number: 20220223487
    Abstract: Various embodiments disclosed relate to a substrate for a semiconductor device. The substrate includes a first major surface and a second major surface opposite the first major surface. The substrate further includes a cavity defined by a portion of the first major surface. The cavity includes a bottom dielectric surface and a plurality of sidewalls extending from the bottom surface to the first major surface. A first portion of a first sidewall includes a conductive material.
    Type: Application
    Filed: March 29, 2022
    Publication date: July 14, 2022
    Inventors: Yi Elyn Xu, Bilal Khalaf, Dennis Sean Carr
  • Embedded component and methods of making the same
    Patent number: 11315843
    Abstract: Various embodiments disclosed relate to a substrate for a semiconductor device. The substrate includes a first major surface and a second major surface opposite the first major surface. The substrate further includes a cavity defined by a portion of the first major surface. The cavity includes a bottom dielectric surface and a plurality of sidewalls extending from the bottom surface to the first major surface. A first portion of a first sidewall includes a conductive material.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: April 26, 2022
    Assignee: Intel Corporation
    Inventors: Yi Elyn Xu, Bilal Khalaf, Dennis Sean Carr
  • MULTI-DIE, VERTICAL-WIRE PACKAGE-IN-PACKAGE APPARATUS, AND METHODS OF MAKING SAME
    Publication number: 20210288034
    Abstract: A vertical-wire package-in-package includes at least two memory-die stacks that form respective memory modules that are stacked vertically on a bond-wire board. Each memory die in the memory-die stack includes a vertical bond wire that emerges from a matrix for connection. The matrix encloses the memory-die stack, the spacer, and a redistribution layer. At least two memory modules are assembled in a vertical-wire package-in-package.
    Type: Application
    Filed: December 28, 2017
    Publication date: September 16, 2021
    Inventors: Hyoung IL Kim, Florence R. Pon, Yi Elyn Xu
  • Through mold via (TMV) using stacked modular mold rings
    Patent number: 10879152
    Abstract: An apparatus is provided which comprises: a substrate; a stacked ring structure disposed on the substrate, the stacked ring structure comprising a first ring and a second ring; a first partial through-mold-via (TMV) formed on the first ring; and a second partial TMV formed on the second ring, wherein the first ring and the second ring are stacked such that the first partial TMV is aligned on top of the second partial TMV.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: December 29, 2020
    Assignee: Intel Corporation
    Inventors: Yi Elyn Xu, Bilal Khalaf
  • EMBEDDED COMPONENT AND METHODS OF MAKING THE SAME
    Publication number: 20190371687
    Abstract: Various embodiments disclosed relate to a substrate for a semiconductor device. The substrate includes a first major surface and a second major surface opposite the first major surface. The substrate further includes a cavity defined by a portion of the first major surface. The cavity includes a bottom dielectric surface and a plurality of sidewalls extending from the bottom surface to the first major surface. A first portion of a first sidewall includes a conductive material.
    Type: Application
    Filed: December 28, 2016
    Publication date: December 5, 2019
    Inventors: Yi Elyn Xu, Bilal Khalaf, Dennis Sean Carr
  • THROUGH MOLD VIA (TMV) USING STACKED MODULAR MOLD RINGS
    Publication number: 20190279919
    Abstract: An apparatus is provided which comprises: a substrate; a stacked ring structure disposed on the substrate, the stacked ring structure comprising a first ring and a second ring; a first partial through-mold-via (TMV) formed on the first ring; and a second partial TMV formed on the second ring, wherein the first ring and the second ring are stacked such that the first partial TMV is aligned on top of the second partial TMV.
    Type: Application
    Filed: December 14, 2016
    Publication date: September 12, 2019
    Applicant: Intel Corporation
    Inventors: Yi Elyn Xu, Bilal Khalaf