Abstract: Systems and methods are provided for predicting systematic design rule check (DRC) violations in a placement layout before routing is performed on the placement layout. A systematic DRC violation prediction system includes DRC violation prediction circuitry. The DRC violation prediction circuitry receives placement data associated with a placement layout. The DRC violation prediction circuitry inspects the placement data associated with the placement layout, and the placement data may include data associated with a plurality of regions of the placement layout, which may be inspected on a region-by-region basis. The DRC violation prediction circuitry predicts whether one or more systematic DRC violations would be present in the placement layout due to a subsequent routing of the placement layout.

Abstract: Systems and methods are provided for predicting systematic design rule check (DRC) violations in a placement layout before routing is performed on the placement layout. A systematic DRC violation prediction system includes DRC violation prediction circuitry. The DRC violation prediction circuitry receives placement data associated with a placement layout. The DRC violation prediction circuitry inspects the placement data associated with the placement layout, and the placement data may include data associated with a plurality of regions of the placement layout, which may be inspected on a region-by-region basis. The DRC violation prediction circuitry predicts whether one or more systematic DRC violations would be present in the placement layout due to a subsequent routing of the placement layout.

Abstract: A magnetic LED die transferring device includes a substrate, a plurality of magnetic members and a vibrating mechanism. The substrate includes a plurality of die locating areas arranged in intervals, and each of the die locating areas includes a locating surface. Each of the magnetic members corresponds to each of the die locating areas and includes an alignment N-pole and an alignment S-pole. The vibrating mechanism is coupled to the substrate. The N-pole and the S-pole of each of the magnetic LED dice are used to be attracted by each of the alignment N-poles and each of the alignment S-poles, respectively, to allow each of the magnetic LED dice to be transferred and aligned to each of the die locating areas.

Abstract: An electronic device is provided. The electronic device includes a first unit and a second unit. The first unit includes a first driving circuit and a first inverter. The second unit is adjacent to the first unit. The second unit includes a second driving circuit. The first inverter is electrically connected to the first driving circuit and the second driving circuit.

Abstract: A carrier for a storage device is provided. The carrier includes an accommodation bracket, a panel and an electromagnetic shielding element. The accommodation bracket has an open space. The panel has a handle. The electromagnetic shielding element is disposed between the accommodation bracket and the panel. The electromagnetic shielding element is engaged with the accommodation bracket.

Abstract: A power detection circuit is provided for detecting current total input power of a resonant circuit. The power detection circuit includes a detection circuit and an estimation circuit. The detection circuit receives a current signal and obtains resonant-slot baseband power according to the current signal to generate the baseband power value. The current signal represents a resonant-slot current generated by the resonant circuit. The estimation circuit receives the baseband power value and estimates the current total input power according to the baseband power value to generate an estimated power value.

Abstract: A semiconductor device includes a first cell in a first row, wherein the first row extends in a first direction, the first cell having a first cell height measured in a second direction perpendicular to the first direction. The semiconductor device further includes a second cell in the first row, wherein the second cell has a second cell height measured in the second direction, the second cell height is less than the first cell height. The second cell includes a first active region having a first width measured in the second direction, and a second active region having a second width measured in the second direction, wherein the second width is different from the first width.

Abstract: A salt of a neuroceutical and of an acid, wherein the neuroceutical is a substituted benzodiazepine, a substituted benzothiazepine, a substituted pyridopyrimidines or a substituted amino-cyclohexaneacetic acid; and the acid is benzoic acid, nicotinic acid, pantothenic acid and tannic acid. The molar ratio of the neuroceutical and the acid in the salt ranges from about 6:1 to about 1:5. Also disclosed herein are compositions comprising the neuroceutical salt and therapeutic uses thereof for treating a central nervous system (CNS) disorder or a metabolic disorder associated with the CNS disorder.

Abstract: In example implementations, an apparatus is provided. The apparatus includes a polymer based enclosure, an absorber, and a connection interface. The polymer based enclosure is shaped to enclose a memory module connected to a memory module connection interface on a printed circuit board. The absorber is coated over the polymer based enclosure to block radio frequency signals generated by the memory modules. The connection interface is to connect to the memory module connection interface.

Abstract: A power detection circuit is provided for detecting current total input power of a resonant circuit. The power detection circuit includes a detection circuit and an estimation circuit. The detection circuit receives a current signal and obtains resonant-slot baseband power according to the current signal to generate the baseband power value. The current signal represents a resonant-slot current generated by the resonant circuit. The estimation circuit receives the baseband power value and estimates the current total input power according to the baseband power value to generate an estimated power value.

Abstract: Systems and methods are provided for predicting static voltage (SIR) drop violations in a clock-tree synthesis (CTS) layout before routing is performed on the CTS layout. A static voltage (SIR) drop violation prediction system includes SIR drop violation prediction circuitry. The SIR drop violation prediction circuitry receives CTS data associated with a CTS layout. The SIR drop violation prediction circuitry inspects the CTS layout data associated with the CTS layout, and the CTS layout data may include data associated with a plurality of regions of the CTS layout, which may be inspected on a region-by-region basis. The SIR drop violation prediction circuitry predicts whether one or more SIR drop violations would be present in the CTS layout due to a subsequent routing of the CTS layout.

Abstract: A heating device includes a resonant circuit, a detection unit and a control unit. The resonant circuit includes an inverter circuit and a resonant tank. The inverter circuit provides a resonant tank current and a resonant tank voltage. The resonant tank includes a heating coil, a resonant tank capacitor, a resonant tank equivalent inductor and a resonant tank equivalent impedance. The detection unit detects the resonant tank current and the resonant tank voltage to acquire associated parameters. The detection unit calculates an inductance of the resonant tank equivalent inductor according to a capacitance of the resonant tank capacitor, a resonant period and a first expression. The detection unit calculates an impedance value of the resonant tank equivalent impedance according to the inductance of the resonant tank equivalent inductor, a time difference, the resonant period, a reference current value, a negative peak current value and a second expression.

Abstract: A method for fabricating a vertical light-emitting diode includes: providing a growth substrate, wherein an epitaxial layer is formed on the growth substrate; forming a metal combined substrate on the epitaxial layer, wherein the metal combined substrate comprises two first metal layers and a second metal layer therebetween, one of the first metal layers is close to the epitaxial layer, and another of the first metal layers is far away from the epitaxial layer; removing the growth substrate; forming a contact metal layer on the epitaxial layer; and removing the second metal layer and the first metal layer far away from the epitaxial layer and leaving the first metal layer close to the epitaxial layer. The vertical light-emitting diode, fabricated by the method, has a thinner thickness, a stronger mechanical strength, a higher light intensity, and a better heat-dissipating effect.

Abstract: A method for manufacturing a composite structure having first and second structural members includes the steps of: (A) placing a plate in a forming mold having a first molding member, and a second molding member with an injection hole; (B) moving the first molding member toward the second molding member to stamp and deform the plate; (C) injecting a molten substrate onto the plate via the injection hole to stamp and deform again the plate so as to form the first structural member; (D) removing an assembly of the first structural member and a solidified substrate from the first molding member; and (E) removing an excess part of the solidified substrate to form the second structural member.

Abstract: An electronic make-up mirror device and a background switching method thereof are provided. The electronic make-up mirror device includes a screen, an image capturing device and a gesture sensor. The method includes following steps. An initial image is captured by using the image capturing device, and an initial frame including the initial image is displayed through the screen. The initial image is analyzed to obtain a foreground object and a background image, where the foreground object includes a face image. A background selection frame is displayed through the screen in response to a first operation according to whether the first operation performed to the initial frame is received. The foreground object and a predetermined background image are integrated in response to reception of a second operation performed to the background selection frame, so as to generate an integrated image, and a switched result frame including the integrated image is displayed.

Abstract: A method includes depositing an acid over a portion of a buffer layer of a solar cell substrate. A front contact material is deposited over the buffer layer, such that the front contact material does not bond to the portion of the buffer layer having the acid on it. Thus, the front contacts of adjacent solar cells of the solar cell substrate are formed with a separation between them.

Abstract: A method for encapsulating solar cells includes a curing step that renders CIGS or other types of solar cell absorber layers resistant to degradation by high-temperature lamination processes. The curing process takes place after IV test and prior to the lamination of an encapsulant film. The curing step is carried out in conjunction with a light soaking step that takes place prior to the IV test. The curing process takes place for a time that may range from 10 minutes to two days and at a high relative humidity, RH. Relative humidities of 20-90% are used and have been effective in passivating selenium vacancy defects associated with the absorber layers. The cured absorber layers are resistant to degradation and produce a solar cell with a high solar cell efficiency.

Abstract: An light apparatus used in forming a solar cell includes a housing separate from other processing in a deposition processing system, a transport mechanism for carrying a solar cell into the housing after deposition of a front contact layer in the deposition processing system, and one or more light source elements arranged to apply light on the solar cell after deposition of the front contact layer. A method of making a solar cell includes forming a back contact layer on a glass substrate, forming an absorber layer on the back contact layer, forming a buffer layer on the absorber layer, and forming a front contact layer above the buffer layer, the glass substrate, back contact layer, absorber layer, buffer layer, and front contact layer forming a first module. The method includes applying a light source to the first module after forming the front contact layer separate from other processing.

Abstract: A 3-D chip stacked structure is disclosed. Each chip layer is provided with plural single-layered conductive members where among the same chip layer the two adjacent conductive members are structurally formed in mirror symmetric way with each other along a chip longitudinal direction and the arrangements of the single-layered conductive members of the two adjacent chip layers are shifted by a test pad distance. The single-layered conductive members of the two adjacent chip layers are communicated through a vertical TSV (through silicon via). Therefore, a selection signal or an enabling signal might be transferred through this specific metal layer and related TSV to reach targeting chip layer and targeting circuit.

Abstract: A multi-band antenna includes a substrate and a conductive layer. The conductive layer covered on a top surface of the substrate includes a ground element, a first radiating element and a second radiating element. The ground element is connected with a bottom side edge of the substrate. The first radiating element is connected with one end of a lower top edge of the ground element. The first radiating element includes a connection portion, a first coupling portion, a first radiating portion and a first inductance portion. The second radiating element is connected with the other end of the lower top edge of the ground element. The second radiating element includes a second inductance portion, a second coupling portion, a second radiating portion and a third radiating portion.