Patents by Inventor Yi-Fong Lin

Yi-Fong Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230058295
    Abstract: A semiconductor structure includes a ceramic substrate, a first bonding layer, a second bonding layer, a cavity, and a semiconductor layer. The ceramic substrate includes holes on its surface. The first bonding layer is disposed on the surface of the ceramic substrate, and the second bonding layer is bonded to the first bonding layer. The cavity is disposed above the hole and enclosed by the first bonding layer and the second bonding layer. The semiconductor layer extends over the cavity and is disposed along the surface of the second bonding layer.
    Type: Application
    Filed: August 22, 2021
    Publication date: February 23, 2023
    Applicant: Vanguard International Semiconductor Corporation
    Inventors: Yang Du, Yung-Fong Lin, Tsung-Hsiang Lin, Yu-Chieh Chou, Cheng-Tao Chou, Yi-Chun Lu, Chun-Hsu Chen
  • Patent number: 11548716
    Abstract: A microwave heating sheet includes a substrate and a heating layer disposed on a first surface of the substrate. The heating layer includes a polar solvent that has a boiling point of not less than 100° C. and a polyelectrolyte that is dissolved in the polar solvent.
    Type: Grant
    Filed: July 22, 2019
    Date of Patent: January 10, 2023
    Assignee: Food Industry Research and Development Institute
    Inventors: Yu-Chi Cheng, Chun-Fong Lin, Yi-Jhen Wu, Binghuei-Barry Yang
  • Publication number: 20220340455
    Abstract: Provided are a system for treating wastewater and a cleaning method thereof. The wastewater treatment system includes: a wastewater compartment, a first electrode, a second electrode, an acid compartment, a base compartment, an acid supply apparatus, a base supply apparatus, a control apparatus, and a power supply device. During the cleaning process, the power supply device provides reverse potential to the first and the second electrodes. The control apparatus shut off a first channel so that the acid supply apparatus provides an acid solution to the base compartment through a second channel, and shut off a third channel so that the base supply apparatus provides an alkaline solution to the acid compartment through a fourth channel, without shutting off the wastewater treatment system.
    Type: Application
    Filed: September 28, 2021
    Publication date: October 27, 2022
    Applicant: Industrial Technology Research Institute
    Inventors: Guan-You Lin, Yi-Fong Pan, Sin-Yi Huang, Hsin-Ju Yang
  • Publication number: 20220262925
    Abstract: Embodiments include nanostructure devices and methods of forming nanostructure devices which include a treatment process to expand a sidewall spacer material to close a seam in the sidewall spacer material after deposition. The treatment process includes oxidation anneal and heat anneal to expand the sidewall spacer material and crosslink the open seam to form a closed seam, lower k-value, and decrease density.
    Type: Application
    Filed: May 17, 2021
    Publication date: August 18, 2022
    Inventors: Li-Chi Yu, Cheng-I Chu, Chen-Fong Tsai, Yi-Rui Chen, Sen-Hong Syue, Wen-Kai Lin, Yoh-Rong Liu, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20220204367
    Abstract: Provided are a system and a method of treating wastewater. The system includes a wastewater chamber, positive and negative electrode chambers, acid and basic solution chambers and a buffer chamber. The wastewater chamber receives wastewater containing a first ion. The positive and the negative electrode chambers are respectively on opposite sides of the wastewater chamber. The acid chamber is between the wastewater chamber and the positive electrode chamber. The basic chamber is between the wastewater chamber and the negative electrode chamber. The buffer chamber is between one of the acid and the basic chambers and the wastewater chamber, and receives the buffer solution containing the first ion. The interfaces between the wastewater chamber and the buffer chamber and between the one of the acid and the basic chambers and the buffer chamber are ion exchange membranes having the same electrical properties.
    Type: Application
    Filed: December 30, 2020
    Publication date: June 30, 2022
    Applicant: Industrial Technology Research Institute
    Inventors: Guan-You Lin, Yi-Fong Pan, Sin-Yi Huang, Hsin-Ju Yang
  • Publication number: 20220047537
    Abstract: Provided herein are pharmaceutical compositions containing (a) at least one liposome includes at least one vesicle-forming phospholipid; and (b) treprostinil encapsulated within the liposome. The ratio of treprostinil to phospholipid is equal to or higher than 0.035 and provides a controlled release of treprostinil. Also provided is the use of the pharmaceutical compositions to treat respiratory diseases.
    Type: Application
    Filed: October 27, 2021
    Publication date: February 17, 2022
    Inventors: Pei KAN, Yi Fong LIN, Ko Chieh CHEN
  • Patent number: 11229616
    Abstract: Provided herein are pharmaceutical compositions containing (a) at least one liposome includes at least one vesicle-forming phospholipid; and (b) treprostinil encapsulated within the liposome. The ratio of treprostinil to phospholipid is equal to or higher than 0.035 and provides a controlled release of treprostinil. Also provided is the use of the pharmaceutical compositions to treat respiratory diseases.
    Type: Grant
    Filed: May 6, 2019
    Date of Patent: January 25, 2022
    Assignee: PHARMOSA BIOPHARM INC.
    Inventors: Pei Kan, Yi Fong Lin, Ko Chieh Chen
  • Publication number: 20200360320
    Abstract: The present invention relates to a pharmaceutical composition containing liposomes, said liposome comprise an external lipid bilayer; and an internal aqueous medium including a weak acid drug with a half-life of less than 2 hours. Also provided is the use of the pharmaceutical composition disclosed herein to treat pulmonary hypertension with reduced dosing frequency.
    Type: Application
    Filed: May 13, 2020
    Publication date: November 19, 2020
    Inventors: Pei Kan, Yi Fong Lin, Ko Chieh Chen
  • Publication number: 20200085741
    Abstract: Provided herein are pharmaceutical compositions containing at least one liposome, said liposome comprise an external lipid bilayer including at least one vesicle-forming phospholipid and less than 15 mole % of sterol; and an internal aqueous medium including a weak acid drug and weak acid salt. The pharmaceutical compositions reduce the burst release of the weak acid drug. Also provided is the use of the pharmaceutical composition disclosed herein to treat respiratory diseases and reduce the side effect of the weak acid drug.
    Type: Application
    Filed: September 12, 2019
    Publication date: March 19, 2020
    Inventors: Pei KAN, Yi Fong LIN, Ko Chieh CHEN
  • Publication number: 20190336461
    Abstract: Provided herein are pharmaceutical compositions containing (a) at least one liposome includes at least one vesicle-forming phospholipid; and (b) treprostinil encapsulated within the liposome. The ratio of treprostinil to phospholipid is equal to or higher than 0.035 and provides a controlled release of treprostinil. Also provided is the use of the pharmaceutical compositions to treat respiratory diseases.
    Type: Application
    Filed: May 6, 2019
    Publication date: November 7, 2019
    Inventors: Pei KAN, Yi Fong LIN, Ko Chieh CHEN
  • Publication number: 20190088488
    Abstract: Provided is a method for fabricating a semiconductor device, which includes the following steps. First, a substrate having at least one transistor is provided. A first insulation layer is formed to cover the transistor. The first insulation layer is patterned to form at least one opening, wherein a part of the transistor is exposed by the opening. At last, an epitaxy is formed in the opening to cover the part of the transistor.
    Type: Application
    Filed: November 15, 2018
    Publication date: March 21, 2019
    Inventors: Hung-Yu CHI, Chien-An YU, Yi-Fong LIN, Feng-Ling CHEN
  • Publication number: 20190022004
    Abstract: The present invention relates to a pharmaceutical composition comprising a weak acid drug, with the use of a bicarbonate salt to achieve a high incorporation of the drug into the liposome and a better therapeutic efficacy. Also disclosed is a method for treating a respiratory disease using the pharmaceutical composition disclosed herein.
    Type: Application
    Filed: July 23, 2018
    Publication date: January 24, 2019
    Inventors: Pei KAN, Yi Fong LIN, Ko Chieh CHEN
  • Publication number: 20170133230
    Abstract: A semiconductor device includes a transistor disposed on a substrate, a first insulation layer, a second insulation layer, an epitaxy and a conductive material. The first insulation layer is disposed on the substrate and protruding over the transistor. The first insulation layer has a recess to expose a top portion of the transistor. The second insulation layer is disposed on the first insulation layer and conforms to the recess and exposes the top portion of the transistor. The epitaxy is disposed in the recess of the first insulation layer and overlaps the top portion of the transistor. The epitaxy conforms to sidewalls of the recess of the first insulation layer. The conductive material is disposed in the recess of the first insulation layer.
    Type: Application
    Filed: January 25, 2017
    Publication date: May 11, 2017
    Inventors: Hung-Yu CHI, Chien-An YU, Yi-Fong LIN, Feng-Ling CHEN
  • Patent number: 9153665
    Abstract: Provided is a method for fabricating a semiconductor device, which includes the following steps. A substrate having a plurality of pillars is provided, wherein a plurality of trenches are formed around each pillar, and a doped region is disposed at a bottom of each pillar. An insulation layer is formed below each doped region. In addition, a gate and a gate dielectric are formed on the sidewalls of each pillar.
    Type: Grant
    Filed: March 11, 2013
    Date of Patent: October 6, 2015
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chien-An Yu, Yuan-Sung Chang, Yi-Fong Lin, Chin-Piao Chang, Chih-Huang Wu, Wen-Chieh Wang
  • Publication number: 20150097228
    Abstract: Provided is a method for fabricating a semiconductor device, which includes the following steps. First, a substrate having at least one transistor is provided. A first insulation layer is formed to cover the transistor. The first insulation layer is patterned to form at least one opening, wherein a part of the transistor is exposed by the opening. At last, an epitaxy is formed in the opening to cover the part of the transistor.
    Type: Application
    Filed: October 7, 2013
    Publication date: April 9, 2015
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: Hung-Yu CHI, Chien-An YU, Yi-Fong LIN, Feng-Ling CHEN
  • Patent number: 8962411
    Abstract: A method of manufacturing a circuit pattern with high aspect ratio is disclosed. A plurality of parallel lines and supporting lines intersecting the parallel lines are formed. Supporting isolation structures are then formed in the space between the parallel lines and the supporting line for supporting the parallel lines in a later etching process. The parallel lines and the supporting line are then disconnected after the etching process.
    Type: Grant
    Filed: August 9, 2012
    Date of Patent: February 24, 2015
    Assignee: Nanya Technology Corp.
    Inventors: Chien-An Yu, Yi-Fong Lin
  • Publication number: 20140252459
    Abstract: Provided is a method for fabricating a semiconductor device, which includes the following steps. A substrate having a plurality of pillars is provided, wherein a plurality of trenches are formed around each pillar, and a doped region is disposed at a bottom of each pillar. An insulation layer is formed below each doped region.
    Type: Application
    Filed: March 11, 2013
    Publication date: September 11, 2014
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: Chien-An Yu, Yuan-Sung Chang, Yi-Fong Lin, Chin-Piao Chang, Chih-Huang Wu, Wen-Chieh Wang
  • Patent number: 8699255
    Abstract: A memory array includes a plurality of word lines extending along a first direction; a plurality of memory cells coupled to a first sub-bit line (SBL) extending along a second direction that is substantially orthogonal to the first direction; a first selector region disposed substantially in the middle of the first SBL thereby dividing the plurality of memory cells into two sub-groups, wherein the first selector region comprises at least one selector transistor that is coupled to the first SBL; and a main bit line (MBL) extending along the second direction and coupled to the selector transistor.
    Type: Grant
    Filed: April 1, 2012
    Date of Patent: April 15, 2014
    Assignee: Nanya Technology Corp.
    Inventors: Chien-An Yu, Yi-Fong Lin
  • Patent number: 8673863
    Abstract: A delivery system is provided. The delivery system includes a carrier or an active compound and a glutathione or a glutathione derivative grafted thereon. The invention also provides a compound including a moiety comprising a vitamin E derivative or a phospholipid derivative, a polyethylene glycol (PEG) or a polyethylene glycol derivative bonded thereto, and a glutathione (GSH) or a glutathione derivative bonded to the polyethylene glycol or the polyethylene glycol derivative.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: March 18, 2014
    Assignee: Industrial Technology Research Institute
    Inventors: Ae-June Wang, Chi-Heng Jian, Shyh-Dar Li, Yi-Fong Lin, Shin-Jr Liu
  • Publication number: 20140041900
    Abstract: A method of manufacturing a circuit pattern with high aspect ratio is disclosed. A plurality of parallel lines and supporting lines intersecting the parallel lines are formed. Supporting isolation structures are then formed in the space between the parallel lines and the supporting line for supporting the parallel lines in a later etching process. The parallel lines and the supporting line are then disconnected after the etching process.
    Type: Application
    Filed: August 9, 2012
    Publication date: February 13, 2014
    Inventors: Chien-An Yu, Yi-Fong Lin