Patents by Inventor Yi-Hao LO

Yi-Hao LO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180267726
    Abstract: Memory space management and memory access control method and apparatus are provided. The method includes: upon receiving an access request, acquiring an access address and an accessor identifier in the access request; checking a current state of a memory space pointed by the access address to obtain a check result, wherein the state of the memory space includes a first state and a second state; determining whether the accessor identifier belongs to an access permission set among a plurality of access permission sets that corresponds to the check result; and generating an instruction according to the check result, wherein the instruction indicates whether or not the accessor is permitted to access the memory space. With the above method, the invention reduces resource waste and system costs.
    Type: Application
    Filed: March 1, 2018
    Publication date: September 20, 2018
    Inventors: MING YONG SUN, Yung Chang, CHUNG-CHING CHEN, YI-HAO LO
  • Patent number: 9589671
    Abstract: A memory self-testing device for testing a plurality of memory control units includes: a test control unit, coupled to the memory control units, generating a plurality of access request signals and a plurality of sets of data; a channel control unit, coupled to the test control unit and the memory control units, determining a leading feedback signal among a plurality of feedback signals; and a data control unit, coupled to the test control unit and the memory control units, storing the sets of data, and transmitting the sets of data to the memory control units according to a plurality of read/write signals. The feedback signals and the read/write signals are generated by the memory control units in response to the access request signals. The test control units generate the sets of data according to the leading feedback signal.
    Type: Grant
    Filed: March 1, 2016
    Date of Patent: March 7, 2017
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chung-Ching Chen, Chen-Nan Lin, Yi-Hao Lo
  • Publication number: 20160260500
    Abstract: A memory self-testing device for testing a plurality of memory control units includes: a test control unit, coupled to the memory control units, generating a plurality of access request signals and a plurality of sets of data; a channel control unit, coupled to the test control unit and the memory control units, determining a leading feedback signal among a plurality of feedback signals; and a data control unit, coupled to the test control unit and the memory control units, storing the sets of data, and transmitting the sets of data to the memory control units according to a plurality of read/write signals. The feedback signals and the read/write signals are generated by the memory control units in response to the access request signals. The test control units generate the sets of data according to the leading feedback signal.
    Type: Application
    Filed: March 1, 2016
    Publication date: September 8, 2016
    Inventors: Chung-Ching CHEN, Chen-Nan LIN, Yi-Hao LO