Patents by Inventor Yi-Hao Wu
Yi-Hao Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11990290Abstract: A detachable pushbutton structure includes a case seat which is formed with an internal receiving space for receiving a base seat and a linking member. The base seat has multiple contact legs. The linking member is drivable to control the respective contact legs to form different conducting states. A support seat connected with the linking member and has an internal penetrating hole. A light-emitting member is received in the penetrating hole and connected with the base seat. A connected section is disposed on an outer side of the support seat. A cap assembly can be tightly capped on the penetrating hole of the support seat. A pushbutton is capped on the cap assembly and has a connection section detachably connected with the connected section. A protective ring securely connected between an inner circumference of the receiving space and an outer circumference of the support seat.Type: GrantFiled: August 12, 2022Date of Patent: May 21, 2024Assignees: Switchlab Inc., Switchlab (Shanghai) Co., Ltd., Gaocheng Electronics Co., Ltd.Inventors: Chih-Yuan Wu, Chih-Hao Sung, Yi-Wen Qiu
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Publication number: 20240162308Abstract: The present disclosure provides a semiconductor structure with having a source/drain feature with a central cavity, and a source/drain contact feature formed in central cavity of the source/drain region, wherein the source/drain contact feature is nearly wrapped around by the source/drain region. The source/drain contact feature may extend to a lower most of a plurality semiconductor layers.Type: ApplicationFiled: February 9, 2023Publication date: May 16, 2024Inventors: Pin Chun SHEN, Che Chia CHANG, Li-Ying WU, Jen-Hsiang LU, Wen-Chiang HONG, Chun-Wing YEUNG, Ta-Chun LIN, Chun-Sheng LIANG, Shih-Hsun CHANG, Chih-Hao CHANG, Yi-Hsien CHEN
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Publication number: 20240142833Abstract: An electronic device includes a substrate, a driving element, a first insulating layer, a pixel electrode layer, and a common electrode layer. The driving element is disposed on the substrate. The first insulating layer is disposed on the driving element. The pixel electrode layer is disposed on the first insulating layer. The first insulating layer comprises a hole, and the pixel electrode layer is electrically connected to the driving element through the hole. The common electrode layer is disposed on the pixel electrode layer. The common electrode layer comprises a slit, and the slit has an edge, and the edge is disposed in the hole.Type: ApplicationFiled: January 11, 2024Publication date: May 2, 2024Applicant: Innolux CorporationInventors: Wei-Yen Chiu, Ming-Jou Tai, You-Cheng Lu, Yi-Shiuan Cherng, Yi-Hsiu Wu, Chia-Hao Tsai, Yung-Hsun Wu
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Publication number: 20240080452Abstract: A video encoder with quality estimation is shown. The video encoder has a video compressor, a video reconstructor, a quality estimator, and an encoder top controller. The video compressor receives the source data of a video to generate compressed data. The video reconstructor is coupled to the video compressor for generation of playback-level data that is buffered for inter prediction by the video compressor, wherein the video reconstructor generates intermediate data and, based on the intermediate data, the video reconstructor generates playback-level data. The quality estimator is coupled to the video reconstructor to receive the intermediate data. Quality estimation is performed based on the intermediate data rather than the playback-level data. Based on the quality estimation result, the encoder top controller adjusts at least one video compression factor in real time.Type: ApplicationFiled: July 12, 2023Publication date: March 7, 2024Inventors: Tung-Hsing WU, Chih-Hao CHANG, Yi-Fan CHANG, Han-Liang CHOU
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Publication number: 20240071909Abstract: A semiconductor package is provided. The semiconductor package includes an encapsulating layer, a semiconductor die formed in the encapsulating layer, and an interposer structure covering the encapsulating layer. The interposer structure includes an insulating base having a first surface facing the encapsulating layer, and a second surface opposite the first surface. The interposer structure also includes insulating features formed on the first surface of the insulating base and extending into the encapsulating layer. The insulating features is arranged in a matrix and faces a top surface of the semiconductor die. The interposer structure further includes first conductive features formed on the first surface of the insulating base and extending into the encapsulating layer. The first conductive features surround the matrix of the insulating features.Type: ApplicationFiled: November 6, 2023Publication date: February 29, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yi-Wen WU, Techi WONG, Po-Hao TSAI, Po-Yao CHUANG, Shih-Ting HUNG, Shin-Puu JENG
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Publication number: 20240071330Abstract: A display device includes a display panel. The display panel has a functional display area. The functional display area includes a plurality of display pixels and a plurality of light transmitting regions. The plurality of display pixels are around by the plurality of the light transmitting regions. A boundary between one of the plurality of display pixels and one of the plurality of light transmitting regions comprises an arc segment.Type: ApplicationFiled: November 3, 2023Publication date: February 29, 2024Applicant: Innolux CorporationInventors: Chia-Hao Tsai, Ming-Jou Tai, Yi-Shiuan Cherng, Yu-Shih Tsou, You-Cheng Lu, Yung-Hsun Wu
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Patent number: 10126951Abstract: A data processing apparatus includes a storage element and a clock controller. The storage element has storage partitions, including a first storage partition and a second storage partition. The clock controller controls clock driving of the first storage partition and the second storage partition. When a processing circuit is configured to operate in a first condition to process a first data sample with a first bit width, the clock controller enables clock driving of both of the first storage partition and the second storage partition. When the processing circuit is configured to operate in a second condition to process a second data sample with a second bit width, the clock controller enables clock driving of the first storage partition and disables clock driving of the second storage partition.Type: GrantFiled: June 16, 2015Date of Patent: November 13, 2018Assignee: MEDIATEK INC.Inventors: Kun-Bin Lee, Tung-Hsing Wu, Yi-Hao Wu
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Publication number: 20160154583Abstract: A data processing apparatus includes a storage element and a clock controller. The storage element has storage partitions, including a first storage partition and a second storage partition. The clock controller controls clock driving of the first storage partition and the second storage partition. When a processing circuit is configured to operate in a first condition to process a first data sample with a first bit width, the clock controller enables clock driving of both of the first storage partition and the second storage partition. When the processing circuit is configured to operate in a second condition to process a second data sample with a second bit width, the clock controller enables clock driving of the first storage partition and disables clock driving of the second storage partition.Type: ApplicationFiled: June 16, 2015Publication date: June 2, 2016Applicant: MEDIATEK INC.Inventors: Kun-Bin Lee, Tung-Hsing Wu, Yi-Hao Wu
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Patent number: D1023935Type: GrantFiled: March 18, 2022Date of Patent: April 23, 2024Assignee: Acer IncorporatedInventors: Ya-Hao Chan, Yi-Heng Lee, Ming-Cheng Wu, Chun-Yu Chen