Abstract: The present disclosure generally relates to novel multiple target inhibitor of tyrosine kinases (TKs) which can suppress angiogenesis, metastasis, oncogenesis, and/or immune regulation activities by inhibiting TKs and have very potent immunomodulatory activity. The present disclosure also relates to a method of using the tyrosine kinase inhibitors, alone or in combination with HDAC inhibitor, for the treatment of cancers, in particular in cancer immunotherapy, by regulating the tumor microenvironment, including reducing tumor hypoxia, reducing lactic acid accumulation, activating CTL, inhibiting the number and activity of immunosuppressive cells, finally obtaining superior anti-cancer benefits and/or producing lasting immune memory.

Abstract: Provided are an aromatic compound represented by Chemical Formula 1 and an electroluminescent device including the same. In Chemical Formula 1, R1, R2, R3, Ar1, and Ar2 are the same as described in the detailed description.

Abstract: An electronic system and a control method thereof are provided. The electronic system includes a projection device and at least one peripheral device. The control method of the electronic system includes: sending an original instruction to a natural language model through the projection device, wherein the projection device has a communication interface and is communicatively connected to the at least one peripheral device through the communication interface; in response to the original instruction corresponding to an operation of the at least one peripheral device, generating at least one standard instruction according to the original instruction through the natural language model; and controlling the at least one peripheral device through the projection device to perform the operation corresponding to the original instruction according to the at least one standard instruction.

Abstract: A system for radio frequency (RF) residual sideband (RSB) calibration includes a complex (in phase/quadrature (I/Q)) signal receiver, a signal generator configured to generate a transmit (Tx) signal, a first phase shifter operably coupled to the real signal transmitter, a first signal combiner configured to combine a receive (Rx) signal with the transmit (Tx) signal to generate a first combined signal, a second phase shifter configured to provide a selected phase shift to the first combined signal, and a complex downconverter configured to generate an in phase Rx signal and a quadrature Rx signal alternatively using an in phase LO signal and a quadrature LO signal to generate one or more signals indicative of relative Tx-Rx LO phase (?), amplitude (A), Tx LO I/Q phase mismatch (?), Rx I/Q amplitude mismatch (?), and Rx I/Q phase mismatch (?) at the output of the complex receiver.

Abstract: A bidirectional interactive traffic-control management system includes a road and traffic network information subsystem, an urban traffic control subsystem and a road-users' route guidance subsystem. The first subsystem forms real-time traffic information of all road sections in the digital urban traffic-control road network. The second subsystem generates a real-time optimal signal timing plan for each intersection based on the real-time traffic information of its connecting road sections. The third subsystem generates a real-time optimal route plan based on the real-time travel information of all road-users, the real-time traffic information of all road sections, and the real-time optimal signal timing plan of each intersection of the road network. It then transmits the optimal route plan into a navigator in a mobile device of a road-user or in an on-board-unit of a moving vehicle or via a roadside unit for transmission.

Abstract: A reticle carrier described herein is configured to quickly discharge the residual charge on a reticle so as to reduce, minimize, and/or prevent particles in the reticle carrier from being attracted to and/or transferred to the reticle. In particular, the reticle carrier may be configured to provide reduced capacitance between an inner baseplate of the reticle carrier and the reticle. The reduction in capacitance may reduce the resistance-capacitance (RC) time constant for discharging the residual charge on the reticle, which may increase the discharge speed for discharging the residual charge through support pins of the reticle carrier. The increase in discharge speed may reduce the likelihood that an electrostatic force in the reticle carrier may attract particles in the reticle carrier to the reticle.

Abstract: The present invention generally relates to a hydroponic culture medium and a hydroponic planting system, more particularly to a Houttuynia cordata hydroponic culture medium, a Houttuynia cordata hydroponic planting system, Houttuynia cordata extracts, a method, and applications thereof. The Houttuynia cordata hydroponic culture medium includes a plant fertilizer and a Houttuynia cordata growth-promoting additive. The Houttuynia cordata growth-promoting additive is selected from the group consisting of: vitamin B complex, seaweed essence, amino acid, microorganism, and a combination thereof. An electronic conductivity of the Houttuynia cordata hydroponic culture medium is between 0.4 ms/cm and 2.0 ms/cm.

Abstract: Embodiment methods for performing a high pressure anneal process during the formation of a semiconductor device, and embodiment devices therefor, are provided. The high pressure anneal process may be a dry high pressure anneal process in which a pressurized environment of the anneal includes one or more process gases. The high pressure anneal process may be a wet anneal process in which a pressurized environment of the anneal includes steam.

Abstract: Embodiments of the present disclosure provide a FinFET semiconductor including a first set of fin structures that are active, a source/drain (S/D) region in contact with the first set of fin structures, a second set of fin structures separated, via a shallow trench isolation (STI) feature, from the first set of fin structures, a contact etch stop layer (CESL) over the S/D region and over the second set of fin structures, and a gate over the first set of fin structures and over the second set of fin structures, the gate including a gate dielectric and a gate electrode over the gate dielectric. The second set of fin structures includes one or more non-active fin structures that are in contact with the CESL without being in contact with the S/D region.

Abstract: A semiconductor structure includes a first circuit area having first fin active regions extending lengthwise along a first direction, each of the first fin active regions includes first channel regions; a second circuit area having second fin active regions extending lengthwise along the first direction, each of the second fin active regions includes second channel regions; a gate connector area between and separating the first and the second circuit areas, the gate connector area having filter fins extending lengthwise along the first direction; and a gate structure extending across the first circuit area, the gate connector area, and the second circuit area along a second direction over the first and second channel regions and the filter fins. A portion of the gate structure in the gate connector area has a greater resistivity than portions of the gate structure in the first and the second circuit areas.

Abstract: This disclosure is directed to a circuit that includes a substrate, a target device on the substrate, and an electrostatic discharge (ESD) device electrically coupled to the target device. The ESD device includes an ESD detection circuit electrically coupled to a first reference voltage supply and a second reference voltage supply, an inverter circuit electrically coupled to the ESD detection circuit and configured to trigger in response to an ESD event on the first or second reference voltage supply, a rectifier circuit electrically coupled to the inverter circuit and configured to rectify a current discharged from the inverter circuit, and a transistor electrically coupled to the rectifier circuit and configured to discharge a remaining current passing through the rectifier circuit.

Abstract: The present disclosure generally relates to compounds class I HDAC inhibitors, their production and applications. The compounds possess epigenetic immunomodulatory activities in the tumor microenvironment (TME) and thus inhibit growth of tumor cells.

Abstract: A particulate matter detection device and a detection method, in particular, a detection device and detection method based on a dielectrophoresis and electrical impedance measurement technology is provided, and more in particular, an electrical impedance detection device utilizing a microfluidic chip, and an application thereof for detecting target particles are provided. The device comprises a sample introducing part, a main channel (3), a dielectrophoresis electric field generating part, and an electrical impedance measurement part. By using the dielectrophoresis electric field generating part to selectively control target cells, detection or counting is performed on a sample flexibly and precisely without the use of labels and antibodies.

Abstract: A light emitting panel includes a circuit substrate, a plurality of first light emitting components, a plurality of second light emitting components, and a plurality of third light emitting components. The circuit substrate has a plurality of main pixel areas. Each main pixel area is divided into a first subpixel area, a second subpixel area, and a third subpixel area. The first light emitting components, the second light emitting components and the third light emitting components are located in the first subpixel areas, the second subpixel areas and the third subpixel areas respectively. The first light emitting components in two adjacent first subpixel areas are electrically connected in series. The size of each of the first light emitting components is larger than the size of each of the second light emitting components and the third light emitting components.

Abstract: A pixel structure, including a first semiconductor layer, a first active layer, a second semiconductor layer, a second active layer, a third semiconductor layer, and an electrode layer that are sequentially stacked, is provided. A first portion of the electrode layer is electrically connected to a first portion of the first semiconductor layer through a first opening of a first portion of the third semiconductor layer, a first opening of a first portion of the second active layer, a first opening of a first portion of the second semiconductor layer, and a first opening of a first portion of the first active layer. A second portion of the electrode layer is electrically connected to a second portion of the second semiconductor layer through a second opening of a second portion of the third semiconductor layer and a second opening of a second portion of the second active layer.

Abstract: A light-emitting device includes a carrier, a reflection layer, a common electrode and a first semiconductor stack. The carrier has a light-emitting region, an electrical connection region and a trench, which separates the light-emitting region from the electrical connection region. The reflection layer is disposed on a sidewall of the trench. The common electrode is disposed in the electrical connection region. The first semiconductor stack is disposed in the light-emitting region, wherein a first type semiconductor layer of the first semiconductor stack is electrically connected to the common electrode. A light-emitting apparatus including the light-emitting device is also provided.

Abstract: A light-emitting element includes a first type semiconductor layer, a second type semiconductor layer, a light-emitting layer, a first electrode, a second electrode, and a multi-layer film. The second type semiconductor layer overlaps the first type semiconductor layer. The light-emitting layer is located between the first type semiconductor layer and the second type semiconductor layer. The first electrode is electrically connected to the first type semiconductor layer and is located on a side of the first type semiconductor layer close to the second type semiconductor layer. The second electrode is electrically connected to the second type semiconductor layer and is located on a side of the second type semiconductor layer facing away from the first type semiconductor layer. The multi-layer film is located on a surface of the first type semiconductor layer facing away from the second type semiconductor layer and has a protrusion portion.

Abstract: A display device includes: a light source having a light emitting surface configured to emit light, a light transmitting layer covering the light source and having a light exit surface configured to receive the light emitted from the light emitting surface, a first metasurface formed between the light emitting surface and the light transmitting layer and configured to concentrate the light emitted by the light source in a first direction along the light emitting surface, and a second metasurface formed on the light exit surface and configured to split the light received by the light exit surface in the first direction.

Abstract: A light emitting device includes a semiconductor structure, an insulating layer, a first electrode, a second electrode, and a third electrode. The semiconductor structure includes a first type semiconductor layer, a second type semiconductor layer, and an active layer disposed between the first type semiconductor layer and the second type semiconductor layer. The insulating layer is disposed on the semiconductor structure. The first electrode is electrically connected to the first type semiconductor layer. The second electrode is electrically connected to the second type semiconductor layer. The first electrode, the second electrode, and the third electrode are structurally separated. The third electrode at least has a first portion. The first portion of the third electrode is disposed on a side wall of the semiconductor structure, and the insulating layer is located between the third electrode and the semiconductor structure.

Abstract: A light emitting panel includes a circuit substrate, a plurality of first light emitting components, a plurality of second light emitting components, and a plurality of third light emitting components. The circuit substrate has a plurality of main pixel areas. Each main pixel area is divided into a first subpixel area, a second subpixel area, and a third subpixel area. The first light emitting components, the second light emitting components and the third light emitting components are located in the first subpixel areas, the second subpixel areas and the third subpixel areas respectively. The first light emitting components in two adjacent first subpixel areas are electrically connected in series. The size of each of the first light emitting components is larger than the size of each of the second light emitting components and the third light emitting components.