Patents by Inventor Yi-Hsien Cheng

Yi-Hsien Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10090993
    Abstract: A packaged circuit including a digital controller, a port physical layer and a digital coding circuit is provided. The digital controller outputs digital data in parallel via a parallel data channel, and the digital data includes a plurality of data bits. The port physical layer includes a clock generator, and outputs a data signal according to the data bits. The clock generator outputs a clock signal to the digital controller. The digital coding circuit is coupled to the digital controller and the port physical layer, and receives the digital data and the clock signal. The digital coding circuit codes the clock signal to generate a plurality of clock bits, and outputs the clock bits to the port physical layer. The port physical layer converts the clock bits into an output clock and outputs the output clock.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: October 2, 2018
    Assignee: ALi Corporation
    Inventors: Hsu-Che Nee, Chi-Bin Chen, Yi-Hsien Cheng
  • Patent number: 10057088
    Abstract: A terminal circuit and an output stage circuit are provided. The terminal circuit is configured between a transmitter and an external device. The transmitter provides a differential signal to the external circuit. The terminal circuit includes a first to a third switches and a first and a second resistor. The first switch is biased by a first voltage provided by the transmitter. The first and the second resistor receive the differential signal. The second switch is coupled between the first switch and the first resistor. The third switch is coupled between the first switch and the second resistor. The first to the third switches are controlled by a first to a third control signals, respectively. When the transmitter operates in a power-off mode, a voltage level of the first voltage is in ground level, and the first to the third control signals turn off the first to third switches.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: August 21, 2018
    Assignee: ALI CORPORATION
    Inventors: Hsu-Che Nee, Yi-Hsien Cheng
  • Publication number: 20180083804
    Abstract: A terminal circuit and an output stage circuit are provided. The terminal circuit is configured between a transmitter and an external device. The transmitter provides a differential signal to the external circuit. The terminal circuit includes a first to a third switches and a first and a second resistor. The first switch is biased by a first voltage provided by the transmitter. The first and the second resistor receive the differential signal. The second switch is coupled between the first switch and the first resistor. The third switch is coupled between the first switch and the second resistor. The first to the third switches are controlled by a first to a third control signals, respectively. When the transmitter operates in a power-off mode, a voltage level of the first voltage is in ground level, and the first to the third control signals turn off the first to third switches.
    Type: Application
    Filed: August 29, 2017
    Publication date: March 22, 2018
    Inventors: Hsu-Che Nee, Yi-Hsien Cheng
  • Publication number: 20170331617
    Abstract: A packaged circuit including a digital controller, a port physical layer and a digital coding circuit is provided. The digital controller outputs digital data in parallel via a parallel data channel, and the digital data includes a plurality of data bits. The port physical layer includes a clock generator, and outputs a data signal according to the data bits. The clock generator outputs a clock signal to the digital controller. The digital coding circuit is coupled to the digital controller and the port physical layer, and receives the digital data and the clock signal. The digital coding circuit codes the clock signal to generate a plurality of clock bits, and outputs the clock bits to the port physical layer. The port physical layer converts the clock bits into an output clock and outputs the output clock.
    Type: Application
    Filed: August 4, 2017
    Publication date: November 16, 2017
    Applicant: ALi Corporation
    Inventors: Hsu-Che Nee, Chi-Bin Chen, Yi-Hsien Cheng
  • Patent number: 9710007
    Abstract: An electronic device and an integrated circuit thereof are provided. The integrated circuit includes a voltage generator and a current generator with a negative temperature coefficient. The voltage generator generates a reference voltage proportional to an absolute temperature based on a predetermined value. The current generator with the negative temperature coefficient receives the reference voltage and generates a reference current based on the reference voltage.
    Type: Grant
    Filed: November 2, 2015
    Date of Patent: July 18, 2017
    Assignee: ALi Corporation
    Inventors: Hsu-Che Nee, Liang-Hsin Chen, Yi-Hsien Cheng
  • Patent number: 9639651
    Abstract: A routing method is illustrated. One exemplary embodiment of the routing method includes: determining a signal path between a signal source and a corresponding receiving terminal according to a routing structure of a system power mesh; determining a routing structure of an independent power mesh that is independent from the system power mesh according to the signal path; and performing a routing process according to the determined routing structure of the independent power mesh and the signal path. The system power mesh and the independent power mesh are respectively coupled to different voltage sources.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: May 2, 2017
    Assignee: ALI Corporation
    Inventors: Liang-Hsin Chen, Yi-Hsien Cheng
  • Publication number: 20160306376
    Abstract: An electronic device and an integrated circuit thereof are provided. The integrated circuit includes a voltage generator and a current generator with a negative temperature coefficient. The voltage generator generates a reference voltage proportional to an absolute temperature based on a predetermined value. The current generator with the negative temperature coefficient receives the reference voltage and generates a reference current based on the reference voltage.
    Type: Application
    Filed: November 2, 2015
    Publication date: October 20, 2016
    Inventors: Hsu-Che Nee, Liang-Hsin Chen, Yi-Hsien Cheng
  • Publication number: 20160275231
    Abstract: A routing method is illustrated. One exemplary embodiment of the routing method includes: determining a signal path between a signal source and a corresponding receiving terminal according to a routing structure of a system power mesh; determining a routing structure of an independent power mesh that is independent from the system power mesh according to the signal path; and performing a routing process according to the determined routing structure of the independent power mesh and the signal path. The system power mesh and the independent power mesh are respectively coupled to different voltage sources.
    Type: Application
    Filed: November 10, 2015
    Publication date: September 22, 2016
    Inventors: Liang-Hsin Chen, Yi-Hsien Cheng