Abstract: This disclosure is a condensate evaporation device. An air conditioning apparatus includes a compressor, an evaporator and a condenser connected with one another. A water tray is arranged to receive the condensate. A water distribution module includes a water separator base and a water separator piece. The water separator piece and the water separator base are combined to define a water channel. The condensate flows through the water channel to evenly flow out. A multi-folded water absorbing body is arranged on one side of the water separator base to absorb the condensate flowed out from the water separator base. The water tank is arranged on a bottom side of the multi-folded water absorbing body. A fan is arranged on one side of the multi-folded water absorbing body. Accordingly, the condensate may be evaporated efficiently.

Abstract: The present application discloses a semiconductor device. The semiconductor device includes a package structure including a first side and a second side opposite to the first side; an interposer structure positioned over the first side of the package structure; a first die positioned over the interposer structure; a second die positioned over the interposer structure; and a plurality of bottom interconnectors positioned on the second side of the package structure, and respectively including: a bottom exterior layer positioned on the second side of the package structure; and a cavity enclosed by the bottom exterior layer.

Abstract: The present application discloses a semiconductor device. The semiconductor device includes a package structure including a first side and a second side opposite to the first side; an interposer structure positioned over the first side of the package structure; a first die positioned over the interposer structure; a second die positioned over the interposer structure; and a plurality of bottom interconnectors positioned on the second side of the package structure, and respectively including: a bottom exterior layer positioned on the second side of the to package structure; and a cavity enclosed by the bottom exterior layer.

Abstract: The present application discloses a semiconductor device. The semiconductor device includes a package structure including a first side and a second side opposite to the first side; an interposer structure positioned over the first side of the package structure; a first die positioned over the interposer structure; a second die positioned over the interposer structure; and a plurality of bottom interconnectors positioned on the second side of the package structure, and respectively including: a bottom exterior layer positioned on the second side of the to package structure; and a cavity enclosed by the bottom exterior layer.

Abstract: A semiconductor device structure includes a first dielectric layer disposed over a semiconductor substrate, and a second dielectric layer disposed over the first dielectric layer. The semiconductor device structure also includes a first conductive plug disposed in the first dielectric layer. A top surface of the first conductive plug is greater than a bottom surface of the first conductive plug. The semiconductor device structure further includes a second conductive plug disposed in the second dielectric layer and directly over the first conductive plug.

Abstract: The present application discloses a semiconductor device with multiple threshold voltages and a method for fabricating the semiconductor device with the multiple threshold voltages. The semiconductor device includes a substrate, a first gate structure positioned in the substrate and having a first depth and a first threshold voltage, and a second gate structure positioned in the substrate and having a second depth and a second threshold voltage. The first depth is greater than the second depth, and the first threshold voltage is different from the second threshold voltage.

Abstract: The present application discloses a semiconductor device with multiple threshold voltages and a method for fabricating the semiconductor device with the multiple threshold voltages. The semiconductor device includes a substrate, a first gate structure positioned in the substrate and having a first depth and a first threshold voltage, and a second gate structure positioned in the substrate and having a second depth and a second threshold voltage. The first depth is greater than the second depth, and the first threshold voltage is different from the second threshold voltage.

Abstract: The present disclosure provides a semiconductor device structure with fine patterns and a method for forming the semiconductor device structure, which can prevent the collapse of the fine patterns. The semiconductor device structure includes a first target structure and a second target structure disposed over a semiconductor substrate. The semiconductor device structure also includes a first spacer element disposed over the first target structure, wherein a topmost point of the first spacer element is between a central line of the first target structure and a central line of the second target structure in a cross-sectional view.

Abstract: The present disclosure provides a semiconductor device structure with fine patterns and a method for forming the semiconductor device structure, which can prevent the collapse of the fine patterns. The semiconductor device structure includes a first target structure and a second target structure disposed over a semiconductor substrate. The semiconductor device structure also includes a first spacer element disposed over the first target structure, wherein a topmost point of the first spacer element is between a central line of the first target structure and a central line of the second target structure in a cross-sectional view.

Abstract: The present disclosure provides a semiconductor device including a recessed access device (RAD) transistor and a method of manufacturing the semiconductor device. The semiconductor device includes a substrate, a gate electrode, and a plurality of impurity regions. The substrate includes a buried layer. The gate electrode is disposed in the substrate and penetrates through the buried layer. The plurality of impurity regions are disposed in the substrate and on either side of the gate electrode.

Abstract: The present disclosure provides a semiconductor device including a recessed access device (RAD) transistor and a method of manufacturing the semiconductor device. The semiconductor device includes a substrate, a gate electrode, and a plurality of impurity regions. The substrate includes a buried layer. The gate electrode is disposed in the substrate and penetrates through the buried layer. The plurality of impurity regions are disposed in the substrate and on either side of the gate electrode.

Abstract: The present disclosure provides a semiconductor structure and a method of forming the same. The semiconductor structure includes a substrate, a first device, a second device, a fin, a first gate dielectric layer, a second gate dielectric layer, and a cut region of the fin. The second device is adjacent to the first device. The fin is disposed on the substrate between the first device and the second device. The first gate dielectric layer is disposed on a first portion of the fin, and the second gate dielectric layer is disposed on a second portion of the fin. The cut region of the fin is formed within a trench between the first device and the second device.

Abstract: A mobile vibration detecting device comprising a vibration detecting unit, an analog-to-digital converting unit, a first band-pass filtering unit, a transform calculation module, a RMS transform module, a packet generating module, and a communication/transmission module is provided. The vibration detecting unit is utilized for generating an acceleration analog signal. The analog-to-digital converting unit is utilized for generating an acceleration digital signal accordingly. The first band-pass filtering unit and the transform calculation module are utilized for generating a velocity digital signal accordingly. The RMS transform module receives the acceleration digital signal and the velocity digital signal to generate an acceleration RMS transform data and a velocity RMS transform data accordingly. The packet generating module and the communication/transmission module transmit the above mentioned data for a detecting person standing by the motorized machine to read directly.