Patents by Inventor Yi-Hsien Lee

Yi-Hsien Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10930239
    Abstract: The present embodiment of the invention provides a gate driving circuit and a display apparatus using the gate driving circuit. The gate driving circuit has a plurality of shift registers, and each shift register includes a first output unit, a first pull-down unit, a second output unit, a second pull-down unit, a voltage coupling unit, and a voltage boosting unit. The first output unit is coupled to a node and a first output end. The second output unit is coupled to the node and a second output end. The first pull-down unit is coupled to the first output end and a reference potential. The second pull-down unit is coupled to the second output end and the reference potential. The voltage coupling unit is coupled between the node and the second output end. The voltage boosting unit is coupled to a preset potential, the first output end, and a node and a gate high potential of a shift register at a previous stage.
    Type: Grant
    Filed: November 21, 2019
    Date of Patent: February 23, 2021
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Kai-Wei Hong, Chun-Da Tu, Ming-Hsien Lee, Chuang-Cheng Yang, Yi-Cheng Lin, Chun-Feng Lin
  • Patent number: 10928743
    Abstract: Embodiments herein beneficially enable simultaneous processing of a plurality of substrates in a digital direct write lithography processing system. In one embodiment a method of processing a plurality of substrate includes positioning a plurality of substrates on a substrate carrier of a processing system, positioning the substrate carrier under the plurality of optical modules, independently leveling each of the plurality of substrates, determining offset information for each of the plurality of substrates, generating patterning instructions based on the offset information for each of the plurality of substrates, and patterning each of the plurality of substrates using the plurality of optical modules. The processing system comprises a base, a motion stage disposed on the base, the substrate carrier disposed on the motion stage, a bridge disposed above a surface of the base and separated therefrom, and a plurality of optical modules disposed on the bridge.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: February 23, 2021
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Chien-Hua Lai, Chia-Hung Kao, Hsiu-Jen Wang, Shih-Hao Kuo, Yi-Sheng Liu, Shih-Hsien Lee, Ching-Chang Chen, Tsu-Hui Yang
  • Publication number: 20210041756
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Application
    Filed: October 29, 2020
    Publication date: February 11, 2021
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Publication number: 20210041755
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Application
    Filed: October 29, 2020
    Publication date: February 11, 2021
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Publication number: 20210041753
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Application
    Filed: October 29, 2020
    Publication date: February 11, 2021
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Publication number: 20210041754
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Application
    Filed: October 29, 2020
    Publication date: February 11, 2021
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Publication number: 20210011525
    Abstract: An electronic device including a first body, a second body, a hinge structure, an electronic assembly and a linkage mechanism is provided. The first body and the second body are pivoted to each other through the hinge structure. The electronic assembly is disposed on the first body. The linkage mechanism is disposed in the first body and connected between the hinge structure and the electronic assembly. When the second body is closed to the first body, the electronic assembly is hidden between the first body and the second body. When the second body is opened relative to the first body with an opening angle less than a predetermined angle, the hinge structure does not drive the linkage mechanism. When the second body is opened relative to the first body with the opening angle not less than the predetermined angle, the hinge structure drives the linkage mechanism and the linkage mechanism drives the electronic assembly to be opened relative to the first body.
    Type: Application
    Filed: July 7, 2020
    Publication date: January 14, 2021
    Applicant: COMPAL ELECTRONICS, INC.
    Inventors: Che-Hsien Lin, Che-Hsien Chu, Ko-Yen Lu, Chun-Chieh Chen, Chen-Ming Lee, Yi-Hung Chen, I-Chien Huang
  • Publication number: 20200411987
    Abstract: An antenna structure includes a ground element, a feeding radiation element, a first radiation element, a second radiation element, a third radiation element, a first capacitor, and a second capacitor. The ground element has a notch region. The feeding radiation element has a feeding point. The first radiation element is coupled to the ground element. The first capacitor is coupled between the feeding radiation element and the first radiation element. The second radiation element is coupled to the ground element. The second capacitor is coupled between the first radiation element and the second radiation element. The third radiation element is coupled to the feeding radiation element. The feeding radiation element, the first radiation element, the second radiation element, the third radiation element, the first capacitor, and the second capacitor are all disposed inside the notch region of the ground element.
    Type: Application
    Filed: October 23, 2019
    Publication date: December 31, 2020
    Inventors: Chung-Hung LO, Yi-Ling TSENG, Chin-Lung TSAI, Ching-Hai CHIANG, Kuan-Hsien LEE, Ying-Cong DENG, Chung-Ting HUNG
  • Publication number: 20200400156
    Abstract: A fan frame body structure includes a first frame body. The first frame body has a first upper end, a first lower end, a first frame wall and a first main flow way. The first main flow way passes through the first frame body and is formed with a first main inlet and a first main outlet respectively at the first upper end and the first lower end. A first subsidiary flow way is disposed in the first frame wall. The first subsidiary flow way is in parallel the first main flow way. The first subsidiary outlet is positioned at the first upper end of the first frame body in flush with and in adjacency to the first main inlet.
    Type: Application
    Filed: July 3, 2020
    Publication date: December 24, 2020
    Inventors: Sung-Wei Sun, Chu-Hsien Chou, Yi-Chih Lin, Pei-Chuan Lee, Wen-Hao Liu
  • Patent number: 10852609
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: December 1, 2020
    Assignee: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Patent number: 10810933
    Abstract: A control circuit includes a power supply switch unit and a reset switch unit. The power supply switch unit is electrically connected to a data line and a pixel circuit. When the data line has a data voltage, the power supply switch unit is turned on according to a power supply signal, so that the pixel circuit is charged by the data voltage. The reset switch unit is electrically connected to the pixel circuit. After the pixel circuit is charged by the data voltage, the reset switch unit is turned on according to the reset signal to reset a voltage of the pixel circuit to the reset voltage.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: October 20, 2020
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Chun-Feng Lin, Chuang-Cheng Yang, Ming-Hsien Lee, Yi-Cheng Lin, Wei-Chia Chiu
  • Patent number: 10803788
    Abstract: A driving circuit includes a first driving switch, a second driving switch and a current regulating unit. The first driving switch is electrically connected to a first power source and a first light emitting element. When the first driving switch is turned on, the first driving switch is configured to receive a first current. The second driving switch is electrically connected to a second power source and a second light emitting element. When the second driving switch is turned on, the second driving switch is configured to receive a second current. The current regulating unit is electrically connected to a negative terminal of the second light emitting element and a positive terminal of the first light emitting element. When the current regulating unit is disabled, the second current sequentially flows through the second light emitting element and the first light emitting element.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: October 13, 2020
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Ming-Hsien Lee, Yi-Cheng Lin, Chuang-Cheng Yang, Kai-Wei Hong, Chun-Feng Lin
  • Patent number: 10797379
    Abstract: An antenna structure includes a nonconductive supporting element, a feeding radiation element, a first radiation element, a second radiation element, a third radiation element, a fourth radiation element, and a tuning radiation element. The first radiation element is coupled to the feeding point. The second radiation element is coupled to the feeding radiation element. The third radiation element is coupled to the feeding radiation element. A slot region is formed between the second radiation element and the third radiation element. The fourth radiation element is coupled to a ground voltage. A coupling gap is formed between the fourth radiation element and the third radiation element. The tuning radiation element is coupled to the fourth radiation element. The feeding radiation element, the first radiation element, the second radiation element, the third radiation element, the fourth radiation element, and the tuning radiation element are disposed on the nonconductive supporting element.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: October 6, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventors: Kuan-Hsien Lee, Ying-Cong Deng, Chung-Hung Lo, Yi-Ling Tseng, Chung-Ting Hung, Chin-Lung Tsai
  • Publication number: 20200312965
    Abstract: Disclosures of the present invention mainly describe a two-dimensional semiconductor device (TDSD), comprising: a two-dimensional semiconductor material (TDSM) layer, a superacid action layer and a superacid solution. The TDSM layer is made of a transition-metal dichalcogenide, and the superacid action layer is formed on the TDSM layer. Particularly, an oxide material is adopted for making the superacid action layer, such that the superacid solution is subsequently applied to the superacid action layer so as to make the superacid solution gets into the superacid action layer by diffusion effect. Experimental data have proved that, letting the superacid solution diffuse into the superacid action layer can not only apply a chemical treatment to the TDSM layer, but also make the TDSD have a luminosity enhancement. Particularly, the luminosity enhancement would not be reduced even if the TDSD contacts with water and/or organic solution during other subsequent manufacturing processes.
    Type: Application
    Filed: October 9, 2019
    Publication date: October 1, 2020
    Inventors: I-TUNG CHEN, YING-YU LAI, CHUN-AN CHEN, XIN-QUAN ZHANG, YI-HSIEN LEE
  • Publication number: 20200312224
    Abstract: A control circuit includes a power supply switch unit and a reset switch unit. The power supply switch unit is electrically connected to a data line and a pixel circuit. When the data line has a data voltage, the power supply switch unit is turned on according to a power supply signal, so that the pixel circuit is charged by the data voltage. The reset switch unit is electrically connected to the pixel circuit. After the pixel circuit is charged by the data voltage, the reset switch unit is turned on according to the reset signal to reset a voltage of the pixel circuit to the reset voltage.
    Type: Application
    Filed: July 9, 2019
    Publication date: October 1, 2020
    Inventors: Chun-Feng LIN, Chuang-Cheng YANG, Ming-Hsien LEE, Yi-Cheng LIN, Wei-Chia CHIU
  • Patent number: 10782808
    Abstract: A shift register and a touch display apparatus thereof are provided. The shift register includes a voltage setting unit, a driving unit, a control unit, a discharge unit, a first compensation transistor, and a second compensation transistor. The voltage setting unit sets a terminal voltage of an internal terminal. The driving unit is coupled to the internal terminal to provide a gate signal and a driving signal. The control unit receives the terminal voltage to provide a control signal. The discharge unit discharges the terminal voltage and the gate signal according to the control signal. The first compensation transistor and the second compensation transistor are coupled in series between a touch enable signal and the internal terminal, and control terminals of the first compensation transistor and the second compensation transistor receive the terminal voltage and the touch enable signal, respectively.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: September 22, 2020
    Assignee: Au Optronics Corporation
    Inventors: Chun-Da Tu, Ming-Hsien Lee, Kai-Wei Hong, Chuang-Cheng Yang, Yi-Cheng Lin, Chun-Feng Lin
  • Publication number: 20200295445
    Abstract: A mobile device includes a metal mechanism element, a dielectric substrate, and a feeding radiation element. The metal mechanism element has an open slot. The open slot substantially has an L-shape. The dielectric substrate is adjacent to the metal mechanism element. The feeding radiation element has a feeding point. The feeding radiation element is disposed on the dielectric substrate. The feeding radiation element at least partially extends along the open slot. An antenna structure is formed by the feeding radiation element and the open slot of the metal mechanism element. The antenna structure covers a first frequency band, a second frequency band, and a third frequency band.
    Type: Application
    Filed: August 26, 2019
    Publication date: September 17, 2020
    Inventors: Yi-Ling TSENG, Chung-Hung LO, Chin-Lung TSAI, Ching-Hai CHIANG, Kuan-Hsien LEE, Ying-Cong DENG, Chung-Ting HUNG
  • Publication number: 20200273754
    Abstract: Integrated circuit devices having optimized fin critical dimension loading are disclosed herein. An exemplary integrated circuit device includes a core region that includes a first multi-fin structure and an input/output region that includes a second multi-fin structure. The first multi-fin structure has a first width and the second multi-fin structure has a second width. The first width is greater than the second width. In some implementations, the first multi-fin structure has a first fin spacing and the second multi-fin structure has a second fin spacing. The first fin spacing is less than the second fin spacing. In some implementations, a first adjacent fin pitch of the first multi-fin structure is greater than or equal to three times a minimum fin pitch and a second adjacent fin pitch of the second multi-fin structure is less than or equal to two times the minimum fin pitch.
    Type: Application
    Filed: May 11, 2020
    Publication date: August 27, 2020
    Inventors: Chia Ming Liang, Yi-Shien Mor, Huai-Hsien Chiu, Chi-Hsin Chang, Jin-Aun Ng, Yi-Juei Lee
  • Publication number: 20200272010
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Application
    Filed: February 18, 2020
    Publication date: August 27, 2020
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Patent number: 10752673
    Abstract: Disclosed herein are methods for high-throughput screening of a functional antibody fragment for an immunoconjugate that targets a protein antigen. The method combines a phage-displayed synthetic antibody library and high-throughput cytotoxicity screening of non-covalently assembled immunotoxins or cytotoxic drug to identify highly functional synthetic antibody fragments for delivering toxin payloads.
    Type: Grant
    Filed: June 12, 2017
    Date of Patent: August 25, 2020
    Assignee: ACADEMIA SINICA
    Inventors: An-Suei Yang, Hong-Sen Chen, Chung-Ming Yu, Shin-Chen Hou, Wei-Ying Kuo, Yi-Kai Chiu, Yueh-Liang Tsou, Hung-Ju Hsu, Hwei-Jiung Wang, Shih-Hsien Chuang, Chao-Pin Lee