Patents by Inventor Yi-Hsien Lee

Yi-Hsien Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11956541
    Abstract: A control method of a driving mechanism is provided, including: the driving mechanism provides a first electrical signal from a control assembly to the driving mechanism to move the movable portion into an initial position relative to the fixed portion, wherein the control assembly includes a control unit and a position sensing unit; the status signal of an inertia sensing unit is read; the control unit sends the status signal to the control unit to calculate a target position; the control unit provides a second electrical signal to the driving assembly according to the target position for driving the driving assembly; a position signal is sent from the position sensing unit to the control unit; the control unit provides a third electric signal to the driving assembly to drive the driving assembly according the position signal.
    Type: Grant
    Filed: January 26, 2023
    Date of Patent: April 9, 2024
    Assignee: TDK TAIWAN CORP.
    Inventors: Chao-Chang Hu, Chen-Hsien Fan, Sung-Mao Tsai, Yueh-Lin Lee, Yu-Chiao Lo, Mao-Kuo Hsu, Ching-Chieh Huan, Yi-Chun Cheng
  • Patent number: 11183568
    Abstract: Disclosures of the present invention mainly describe a two-dimensional semiconductor device (TDSD), comprising: a two-dimensional semiconductor material (TDSM) layer, a superacid action layer and a superacid solution. The TDSM layer is made of a transition-metal dichalcogenide, and the superacid action layer is formed on the TDSM layer. Particularly, an oxide material is adopted for making the superacid action layer, such that the superacid solution is subsequently applied to the superacid action layer so as to make the superacid solution gets into the superacid action layer by diffusion effect. Experimental data have proved that, letting the superacid solution diffuse into the superacid action layer can not only apply a chemical treatment to the TDSM layer, but also make the TDSD have a luminosity enhancement. Particularly, the luminosity enhancement would not be reduced even if the TDSD contacts with water and/or organic solution during other subsequent manufacturing processes.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: November 23, 2021
    Assignee: National Tsing Hua University
    Inventors: I-Tung Chen, Ying-Yu Lai, Chun-An Chen, Xin-Quan Zhang, Yi-Hsien Lee
  • Patent number: 11139371
    Abstract: A two-dimensional (2D) semiconductor with geometry structure and generating method thereof is disclosed herein and the method includes following steps: forming a nano-layer; disposing a 2D material on a substrate; forming a medium layer on the 2D material; transferring the medium layer and the 2D material to the nano-layer; removing the medium layer and leaving the 2D material on a surface of the nano-layer. In accordance with the generating method for 2D semiconductor with geometry structure, a nano microstructure is implemented to enhance and control the 2D materials for field emission and photon emission efficiency.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: October 5, 2021
    Assignee: National Tsing Hua University
    Inventors: Tung-han Yang, Yeu-wei Harn, Xin-quan Zhang, I-tung Chen, Yi-hsien Lee
  • Patent number: 11024716
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a substrate; a fin structure, disposed over the substrate; a gate structure, disposed over the substrate and covering a portion of the fin structure; a first sidewall, disposed over the substrate and surrounding a lower portion of the gate structure; and a second sidewall, disposed over the first sidewall and directly surrounding an upper portion of the gate structure, wherein the first sidewall is orthogonal to the second sidewall.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: June 1, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Cheng-Ta Wu, Yi-Hsien Lee, Wei-Ming You, Ting-Chun Wang
  • Publication number: 20200312965
    Abstract: Disclosures of the present invention mainly describe a two-dimensional semiconductor device (TDSD), comprising: a two-dimensional semiconductor material (TDSM) layer, a superacid action layer and a superacid solution. The TDSM layer is made of a transition-metal dichalcogenide, and the superacid action layer is formed on the TDSM layer. Particularly, an oxide material is adopted for making the superacid action layer, such that the superacid solution is subsequently applied to the superacid action layer so as to make the superacid solution gets into the superacid action layer by diffusion effect. Experimental data have proved that, letting the superacid solution diffuse into the superacid action layer can not only apply a chemical treatment to the TDSM layer, but also make the TDSD have a luminosity enhancement. Particularly, the luminosity enhancement would not be reduced even if the TDSD contacts with water and/or organic solution during other subsequent manufacturing processes.
    Type: Application
    Filed: October 9, 2019
    Publication date: October 1, 2020
    Inventors: I-TUNG CHEN, YING-YU LAI, CHUN-AN CHEN, XIN-QUAN ZHANG, YI-HSIEN LEE
  • Publication number: 20200119146
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a substrate; a fin structure, disposed over the substrate; a gate structure, disposed over the substrate and covering a portion of the fin structure; a first sidewall, disposed over the substrate and surrounding a lower portion of the gate structure; and a second sidewall, disposed over the first sidewall and directly surrounding an upper portion of the gate structure, wherein the first sidewall is orthogonal to the second sidewall.
    Type: Application
    Filed: December 10, 2019
    Publication date: April 16, 2020
    Inventors: CHENG-TA WU, YI-HSIEN LEE, WEI-MING YOU, TING-CHUN WANG
  • Publication number: 20200111868
    Abstract: A two-dimensional (2D) semiconductor with geometry structure and generating method thereof is disclosed herein and the method includes following steps: forming a nano-layer; disposing a 2D material on a substrate; forming a medium layer on the 2D material; transferring the medium layer and the 2D material to the nano-layer; removing the medium layer and leaving the 2D material on a surface of the nano-layer. In accordance with the generating method for 2D semiconductor with geometry structure, a nano microstructure is implemented to enhance and control the 2D materials for field emission and photon emission efficiency.
    Type: Application
    Filed: October 7, 2019
    Publication date: April 9, 2020
    Inventors: Tung-han Yang, Yeu-wei Harn, Xin-quan Zhang, I-tung Chen, Yi-hsien Lee
  • Patent number: 10504998
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a substrate; a fin structure protruding from the substrate, the fin structure extending along a first direction; isolation features disposed on both sides of the fin structure; a gate structure over the fin structure and extending on the isolation features along a second direction perpendicular to the first direction; and wherein the gate structure includes a first segment and a second segment, the second segment being over the first segment and including a greater dimension in the first direction than that of the first segment.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: December 10, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Cheng-Ta Wu, Yi-Hsien Lee, Wei-Ming You, Ting-Chun Wang
  • Publication number: 20180012963
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a substrate; a fin structure protruding from the substrate, the fin structure extending along a first direction; isolation features disposed on both sides of the fin structure; a gate structure over the fin structure and extending on the isolation features along a second direction perpendicular to the first direction; and wherein the gate structure includes a first segment and a second segment, the second segment being over the first segment and including a greater dimension in the first direction than that of the first segment.
    Type: Application
    Filed: September 12, 2017
    Publication date: January 11, 2018
    Inventors: CHENG-TA WU, YI-HSIEN LEE, WEI-MING YOU, TING-CHUN WANG
  • Patent number: 9768261
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a substrate; a fin structure protruding from the substrate, the fin structure extending along a first direction; isolation features disposed on both sides of the fin structure; a gate structure over the fin structure and extending on the isolation features along a second direction perpendicular to the first direction; and wherein the gate structure includes a first segment and a second segment, the second segment being over the first segment and including a greater dimension in the first direction than that of the first segment.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: September 19, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Cheng-Ta Wu, Yi-Hsien Lee, Wei-Ming You, Ting-Chun Wang
  • Patent number: 9637839
    Abstract: Aromatic molecules are seeded on a surface of a growth substrate; and a layer (e.g., a monolayer) of a metal dichalcogenide is grown via chemical vapor deposition on the growth substrate surface seeded with aromatic molecules. The seeded aromatic molecules are contacted with a solvent that releases the metal dichalcogenide layer from the growth substrate. The metal dichalcogenide layer can be released with an adhered transfer medium and can be deposited on a target substrate.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: May 2, 2017
    Assignee: Massachusetts Institute of Technology
    Inventors: Jing Kong, Lain-Jong Li, Yi-Hsien Lee
  • Publication number: 20160308059
    Abstract: A semiconductor structure and a method for forming the same are provided. The semiconductor structure includes: a substrate; a fin structure protruding from the substrate, the fin structure extending along a first direction; isolation features disposed on both sides of the fin structure; a gate structure over the fin structure and extending on the isolation features along a second direction perpendicular to the first direction; and wherein the gate structure includes a first segment and a second segment, the second segment being over the first segment and including a greater dimension in the first direction than that of the first segment.
    Type: Application
    Filed: April 17, 2015
    Publication date: October 20, 2016
    Inventors: CHENG-TA WU, YI-HSIEN LEE, WEI-MING YOU, TING-CHUN WANG
  • Publication number: 20150102713
    Abstract: A casing for receiving a hard disk drive includes a top wall, a bottom wall, two sidewalls, and an end wall. A number of metal bars protrude from an inner surface of the top wall.
    Type: Application
    Filed: October 31, 2013
    Publication date: April 16, 2015
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Chih-Hao LIN, Yi-Hsien LEE
  • Publication number: 20150064471
    Abstract: A metal dichalcogenide layer is produced on a transfer substrate by seeding F16CuPc molecules on a surface of a growth substrate, growing a layer (e.g., a monolayer) of a metal dichalcogenide via chemical vapor deposition on the growth substrate surface seeded with F16CuPc molecules, and contacting the F16CuPc-molecule and metal-dichalcogenide coated growth substrate with a composition that releases the metal dichalcogenide from the growth substrate.
    Type: Application
    Filed: August 27, 2014
    Publication date: March 5, 2015
    Inventors: Mildred S. Dresselhaus, Jing Kong, Yi-Hsien Lee, Xi Ling
  • Publication number: 20150047822
    Abstract: A heat sink is configured to dissipate heat generated by an electronic component and protect the electronic component from Electromagnetic Interference (EMI). The heat sink comprises a base and a number of waveguides extending out from the base. A number of through holes is defined through the base. Each of the waveguides is a hollow but blind tube communicating with a through hole.
    Type: Application
    Filed: August 18, 2014
    Publication date: February 19, 2015
    Inventors: CHIH-HAO LIN, YI-HSIEN LEE
  • Publication number: 20140245946
    Abstract: Aromatic molecules are seeded on a surface of a growth substrate; and a layer (e.g., a monolayer) of a metal dichalcogenide is grown via chemical vapor deposition on the growth substrate surface seeded with aromatic molecules. The seeded aromatic molecules are contacted with a solvent that releases the metal dichalcogenide layer from the growth substrate. The metal dichalcogenide layer can be released with an adhered transfer medium and can be deposited on a target substrate.
    Type: Application
    Filed: February 28, 2014
    Publication date: September 4, 2014
    Applicant: Massachusetts Institute of Technology
    Inventors: Jing Kong, Lain-Jong Li, Yi-Hsien Lee
  • Patent number: 7800391
    Abstract: An apparatus and method for testing an integrated circuit in a target electronic application, wherein the apparatus includes a socket for receiving the integrated circuit, a modified commercial electronic product which models the target electronic application, and an electrical connection between the socket and the modified commercial electronic product. The method of testing an integrated circuit includes placing an integrated circuit in a socket that is coupled to a circuit board substantially identical to that of a circuit board configured to include the integrated circuit, but which does not include the integrated circuit, and testing the integrated circuit. A method of making such a tester mechanically attaching a socket to a modified commercial electronic product and electrically connecting an integrated circuit and the modified commercial electronic product. This approach allows for cheaper, more comprehensive, and more accurate testing of an integrated circuit.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: September 21, 2010
    Assignee: MediaTek Inc.
    Inventors: Tai-Hung Lin, Chih-Ming Chiang, Yi-Hsien Lee, Chi-Ming Lee
  • Publication number: 20070164771
    Abstract: An apparatus and method for testing an integrated circuit in a target electronic application, wherein the apparatus comprises a socket for receiving the integrated circuit, a modified commercial electronic product which models the target electronic application, and an electrical connection between the socket and the modified commercial electronic product. The method of testing an integrated circuit comprises placing an integrated circuit in a socket that is coupled to a circuit board substantially identical to that of a circuit board configured to include the integrated circuit, but which does not include the integrated circuit, and testing the integrated circuit. A method of making such a tester mechanically attaching a socket to a modified commercial electronic product and electrically connencting an integrated circuit and the modified commercial electronic product. This approach allows for cheaper, more comprehensive, and more accurate testing of an integrated circuit.
    Type: Application
    Filed: June 23, 2006
    Publication date: July 19, 2007
    Inventors: Tai-Hung Lin, Chih-Ming Chiang, Yi-Hsien Lee, Chi-Ming Lee
  • Publication number: 20040012556
    Abstract: A method and device for controlling the illumination of a backlight of an LCD includes a light sensor that generates an ambient light intensity value, a processor that interprets the measured ambient light intensity value, a light source that is controlled by the processor, and an LCD device that is illuminated by the light source. The processor first calculates a light source intensity value based on a user-adjustable desired apparent light source brightness value and the measured ambient light intensity value. The processor then triggers the light source to emit light at a time-averaged intensity, utilizing frequency variation or a varying duty cycle, which corresponds to the calculated light source intensity value, such that the LCD device is illuminated. In this way, the information displayed on the LCD is clearly visible to a user in any ambient lighting condition.
    Type: Application
    Filed: July 17, 2002
    Publication date: January 22, 2004
    Inventors: Sea-Weng Yong, Chih-Chiang Huang, Yi-Hsien Lee
  • Patent number: 5761479
    Abstract: A single chip replacement upgradeable/downgradeable data processing system capable of operating with different types of central processing unit (CPU) chips. The system has a first socket for registration of a first CPU chip and a second socket for registration of a second CPU chip. Circuitry is provided for preventing possible signal contention between the first and second CPU chips and for synchronizing clocks for operating a CPU with the system clock. Circuitry is also provided for interfacing with a coprocessor associated with the different types of CPU chips as well as for adjusting the signals to and from the CPU chips to the signal width of the system.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: June 2, 1998
    Assignee: Acer Incorporated
    Inventors: Hung-Ta Huang, Te-Chih Chuang, Yunn-Hung Liao, Yi-Hsien Lee, Lung Wei