Patents by Inventor Yi-Hsiu LEE
Yi-Hsiu LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11800702Abstract: A method for forming a memory device includes the steps of providing a substrate, forming an isolation structure in the substrate to define a plurality of active regions in the substrate, the active regions respectively comprising two terminal portions and a central portion between the terminal portions, forming a plurality of island features on the substrate, wherein each of the island features covers two of the terminals portions respectively belonging to two of the active regions, performing a first etching process, using the island features as an etching mask to etch the substrate to define a plurality of island structures and a first recessed region surrounding the island structures on the substrate, and removing the island features to expose the island structures.Type: GrantFiled: March 16, 2021Date of Patent: October 24, 2023Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.Inventors: Hsu-Yang Wang, Ping-Cheng Hsu, Shih-Fang Tzou, Chin-Lung Lin, Yi-Hsiu Lee, Koji Taniguchi, Harn-Jiunn Wang, Tsung-Ying Tsai
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Publication number: 20230135782Abstract: A disability level automatic judgment device is disclosed. The disability level automatic judgment device includes a processor and a memory. The processor is configured to create a diagnosis information graph according to a diagnosis content, to compare the diagnosis information graph and a standard disability graph, so as to determine a first disability level, and to generate a judgment result according to the first disability level. The memory is coupled to the processor, and the memory is configured to store the standard disability graph.Type: ApplicationFiled: November 25, 2021Publication date: May 4, 2023Inventors: Tai-Ta KUO, Yu-Chuan YANG, Jia Wei KAO, Fu-Jheng JHENG, Yi Hsiu LEE, Ping-I CHEN
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Publication number: 20220147835Abstract: A knowledge graph construction system and method are disclosed. The system generates a recommended subject entity, at least one recommended object entity, and at least one recommended relation for a piece of text data according to the text data and a plurality of triples. The system displays the recommended object entity and the recommended relation at a current paragraph of the text data according to the recommended subject entity for user to select. The system receives a confirmed message related to the recommended subject entity, a recommended object entity selected by user from the at least one recommended object entity, and a recommended relation selected by user from the at least one recommended relation. The system adds the recommended subject entity and the selected recommended object entity and recommended relation to the triples, and constructs a current knowledge graph by using the triples according to the confirmed message.Type: ApplicationFiled: December 3, 2020Publication date: May 12, 2022Inventors: Hsin-Yi KUO, Wen-Nan WANG, Jia-Wei KAO, Wen-Fa HUANG, Po-Hsien CHIANG, Fu-Jheng JHENG, Yi-Hsiu LEE, Yu-Chuan YANG
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Publication number: 20210202492Abstract: A method for forming a memory device includes the steps of providing a substrate, forming an isolation structure in the substrate to define a plurality of active regions in the substrate, the active regions respectively comprising two terminal portions and a central portion between the terminal portions, forming a plurality of island features on the substrate, wherein each of the island features covers two of the terminals portions respectively belonging to two of the active regions, performing a first etching process, using the island features as an etching mask to etch the substrate to define a plurality of island structures and a first recessed region surrounding the island structures on the substrate, and removing the island features to expose the island structures.Type: ApplicationFiled: March 16, 2021Publication date: July 1, 2021Inventors: Hsu-Yang Wang, Ping-Cheng Hsu, Shih-Fang Tzou, Chin-Lung Lin, Yi-Hsiu Lee, Koji Taniguchi, Harn-Jiunn Wang, Tsung-Ying Tsai
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Patent number: 10985166Abstract: A method for forming a memory device is disclosed, including providing a substrate, forming an isolation structure and plural active regions in the substrate, forming a plurality of island features on the substrate respectively covering two of the terminal portions of the active regions, using the island features as an etching mask to etch the substrate to perform a first etching process to define a first recessed region and plural island structures on the substrate. The island structures respectively comprise the two terminal portions of the active regions and the first recessed region comprises the central portions of the active regions.Type: GrantFiled: October 31, 2018Date of Patent: April 20, 2021Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.Inventors: Hsu-Yang Wang, Ping-Cheng Hsu, Shih-Fang Tzou, Chin-Lung Lin, Yi-Hsiu Lee, Koji Taniguchi, Harn-Jiunn Wang, Tsung-Ying Tsai
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Patent number: 10969687Abstract: A method for forming patterns is provided in the present invention. The process includes the steps of using a first mask to perform a first exposure process to a photoresist, using a second mask to perform a second exposure process to the photoresist, wherein the corners of the second opening patterns in the second mask and the corners of the first opening patterns in the first mask overlap each other, and performing a development process to remove the unexposed portions of the photoresist in the two exposure processes to form staggered hole patterns therein.Type: GrantFiled: December 4, 2018Date of Patent: April 6, 2021Assignee: UNITED MICROELECTRONICS CORP.Inventors: Harn-Jiunn Wang, Kai-Ming Liu, Chin-Lung Lin, Yi-Hsiu Lee
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Publication number: 20190187562Abstract: A method for forming patterns is provided in the present invention. The process includes the steps of using a first mask to perform a first exposure process to a photoresist, using a second mask to perform a second exposure process to the photoresist, wherein the corners of the second opening patterns in the second mask and the corners of the first opening patterns in the first mask overlap each other, and performing a development process to remove the unexposed portions of the photoresist in the two exposure processes to form staggered hole patterns therein.Type: ApplicationFiled: December 4, 2018Publication date: June 20, 2019Inventors: Harn-Jiunn Wang, Kai-Ming Liu, Chin-Lung Lin, Yi-Hsiu Lee
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Publication number: 20190189620Abstract: A method for forming a memory device is disclosed, including providing a substrate, forming an isolation structure and plural active regions in the substrate, forming a plurality of island features on the substrate respectively covering two of the terminal portions of the active regions, using the island features as an etching mask to etch the substrate to perform a first etching process to define a first recessed region and plural island structures on the substrate. The island structures respectively comprise the two terminal portions of the active regions and the first recessed region comprises the central portions of the active regions.Type: ApplicationFiled: October 31, 2018Publication date: June 20, 2019Inventors: Hsu-Yang Wang, Ping-Cheng Hsu, Shih-Fang Tzou, Chin-Lung Lin, Yi-Hsiu Lee, Koji Taniguchi, Harn-Jiunn Wang, Tsung-Ying Tsai
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Patent number: 10142903Abstract: A relay gateway device includes a processor and a storage, in which when a packet transmission is performed between a first mobile device and a second mobile device and the second mobile device switches from the relay gateway device to another, the IP address of the second mobile device changes from a former IP address to a current IP address. When the first mobile device transmits a first packet to the second mobile device in which the destination address of the first packet is the former IP address, the processor of the relay gateway device modifies the destination address of the first packet into the current IP address according to the former IP address and the current IP address of the second mobile device in a list of the storage and then transmits the first packet to the second mobile device, thereby achieving a seamless transmission during handover.Type: GrantFiled: December 7, 2016Date of Patent: November 27, 2018Assignees: WISTRON NEWEB CORPORATION, INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yi-Hsiu Lee, Jen-Shun Yang, I-Hsing Tsai, Szu-Hsien Huang, Chui-Chu Cheng, Feng-Zhong Hsu
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Publication number: 20180182084Abstract: A gas leakage detection method is provided. The method includes the followings steps. Receive an infrared video. Capture a first image and a second image from the infrared video, wherein the first image and the second image are consecutive image frames in order. Calculate a difference between the first image and the second image to generate a first difference image. Filter the first difference image with a filtering criterion to generate a first filtered image. Transform the first filtered image with a transfer function to generate a first detail image, wherein the absolute value of pixel value in the first detail image is greater than or equal to the absolute value of corresponding pixel value in the first filtered image. Superimpose the first detail image and the first image to generate a gas leakage enhanced image.Type: ApplicationFiled: December 28, 2016Publication date: June 28, 2018Inventors: Yi-Hsiu LEE, Hao-Ting CHAO, Hung-Chun LIN
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Publication number: 20180160355Abstract: A relay gateway device includes a processor and a storage, in which when a packet transmission is performed between a first mobile device and a second mobile device and the second mobile device switches from the relay gateway device to another, the IP address of the second mobile device changes from a former IP address to a current IP address. When the first mobile device transmits a first packet to the second mobile device in which the destination address of the first packet is the former IP address, the processor of the relay gateway device modifies the destination address of the first packet into the current IP address according to the former IP address and the current IP address of the second mobile device in a list of the storage and then transmits the first packet to the second mobile device, thereby achieving a seamless transmission during handover.Type: ApplicationFiled: December 7, 2016Publication date: June 7, 2018Inventors: YI-HSIU LEE, JEN-SHUN YANG, I-HSING TSAI, SZU-HSIEN HUANG, CHUI-CHU CHENG, FENG-ZHONG HSU
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Patent number: 9530731Abstract: A method of optical proximity correction executed by a computer system for modifying line patterns includes the following steps. First, providing an integrated circuit layout with parallel line patterns and interconnect patterns disposed corresponding to the parallel line patterns. Then, using the computer to modify the integrated circuit layout based on a position of the interconnect patterns so as to generate a convex portion and a concave portion respectively on two sides of each of the parallel line patterns. Portions of the line pattern in front of and behind the convex portion and the concave portion are straight lines and have an identical critical dimension.Type: GrantFiled: January 27, 2015Date of Patent: December 27, 2016Assignee: UNITED MICROELECTRONICS CORP.Inventors: Kuan-Wen Fang, Chin-Lung Lin, Kuo-Chang Tien, Yi-Hsiu Lee, Chien-Hsiung Wang
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Publication number: 20160358813Abstract: A method of forming trenches is provided. A first layer, a second layer and a third layer are formed on the substrate. A patterned third layer with a plurality of third trenches is formed. A spacer is formed on sidewalls of the third trenches, following by removing a portion of the patterned third layer between the third trenches. By using the spacer and the patterned third layer as a mask, a patterned second layer with a plurality of second trenches is formed. Next, the patterned third layer and the spacer are completely removed, and a block layer is formed on the patterned second layer, filling into the at least one second trench to separate said second trench into at least two parts. The first layer is patterned by using the patterned second layer and the block layer as a mask to form a patterned first layer with first trenches.Type: ApplicationFiled: June 8, 2015Publication date: December 8, 2016Inventors: Harn-Jiunn Wang, Chin-Lung Lin, Yi-Hsiu Lee
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Patent number: 9502285Abstract: A method of forming trenches is provided. A first layer, a second layer and a third layer are formed on the substrate. A patterned third layer with a plurality of third trenches is formed. A spacer is formed on sidewalls of the third trenches, following by removing a portion of the patterned third layer between the third trenches. By using the spacer and the patterned third layer as a mask, a patterned second layer with a plurality of second trenches is formed. Next, the patterned third layer and the spacer are completely removed, and a block layer is formed on the patterned second layer, filling into the at least one second trench to separate said second trench into at least two parts. The first layer is patterned by using the patterned second layer and the block layer as a mask to form a patterned first layer with first trenches.Type: GrantFiled: June 8, 2015Date of Patent: November 22, 2016Assignee: UNITED MICROELECTRONICS CORP.Inventors: Harn-Jiunn Wang, Chin-Lung Lin, Yi-Hsiu Lee
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Patent number: 9396728Abstract: Remote controllers and systems thereof are disclosed. The remote controller remotely operates a receiving host, in which the receiving host provides voice input and speech recognition functions. The remote controller comprises a first input unit and a second input unit for generating a voice input request and a speech recognition request. The generated voice input and speech recognition requests are then sent to the receiving host, thereby forcing the receiving host to perform the voice input and speech recognition functions.Type: GrantFiled: July 22, 2015Date of Patent: July 19, 2016Assignee: ASUSTEK COMPUTER INC.Inventors: Chia-Chen Liu, Yun-Jung Wu, Liang-Yi Huang, Yi-Hsiu Lee
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Publication number: 20150325239Abstract: Remote controllers and systems thereof are disclosed. The remote controller remotely operates a receiving host, in which the receiving host provides voice input and speech recognition functions. The remote controller comprises a first input unit and a second input unit for generating a voice input request and a speech recognition request. The generated voice input and speech recognition requests are then sent to the receiving host, thereby forcing the receiving host to perform the voice input and speech recognition functions.Type: ApplicationFiled: July 22, 2015Publication date: November 12, 2015Inventors: Chia-Chen Liu, Yun-Jung Wu, Liang-Yi Huang, Yi-Hsiu Lee
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Patent number: 9123344Abstract: Remote controllers and systems thereof are disclosed. The remote controller remotely operates a receiving host, in which the receiving host provides voice input and speech recognition functions. The remote controller comprises a first input unit and a second input unit for generating a voice input request and a speech recognition request. The generated voice input and speech recognition requests are then sent to the receiving host, thereby forcing the receiving host to perform the voice input and speech recognition functions.Type: GrantFiled: February 9, 2009Date of Patent: September 1, 2015Assignee: ASUSTEK COMPUTER INC.Inventors: Chia-Chen Liu, Yun-Jung Wu, Liang-Yi Huang, Yi-Hsiu Lee
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Publication number: 20150137369Abstract: A method of optical proximity correction executed by a computer system for modifying line patterns includes the following steps. First, providing an integrated circuit layout with parallel line patterns and interconnect patterns disposed corresponding to the parallel line patterns. Then, using the computer to modify the integrated circuit layout based on a position of the interconnect patterns so as to generate a convex portion and a concave portion respectively on two sides of each of the parallel line patterns. Portions of the line pattern in front of and behind the convex portion and the concave portion are straight lines and have an identical critical dimension.Type: ApplicationFiled: January 27, 2015Publication date: May 21, 2015Inventors: Kuan-Wen Fang, Chin-Lung Lin, Kuo-Chang Tien, Yi-Hsiu Lee, Chien-Hsiung Wang
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Patent number: 8977988Abstract: A method of optical proximity correction executed by a computer system and integrated circuit layout formed by the same, the step of optical proximity correction comprises: providing an integrated circuit layout with a plurality of parallel line patterns, wherein one side of at least one line pattern is provided with a convex portion; and modifying the integrated circuit layout by forming a concave portion corresponding to the convex portion at the other side of the line pattern.Type: GrantFiled: April 9, 2013Date of Patent: March 10, 2015Assignee: United Microelectronics Corp.Inventors: Kuan-Wen Fang, Chin-Lung Lin, Kuo-Chang Tien, Yi-Hsiu Lee, Chien-Hsiung Wang
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Publication number: 20140304666Abstract: A method of optical proximity correction executed by a computer system and integrated circuit layout formed by the same, the step of optical proximity correction comprises: providing an integrated circuit layout with a plurality of parallel line patterns, wherein one side of at least one line pattern is provided with a convex portion; and modifying the integrated circuit layout by forming a concave portion corresponding to the convex portion at the other side of the line pattern.Type: ApplicationFiled: April 9, 2013Publication date: October 9, 2014Applicant: United Microelectronics Corp.Inventors: Kuan-Wen Fang, Chin-Lung Lin, Kuo-Chang Tien, Yi-Hsiu Lee, Chien-Hsiung Wang