Patents by Inventor Yi-Huei Chen

Yi-Huei Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240105241
    Abstract: Disclosed herein are related to a memory device. In one aspect, a memory device includes a set of memory cells. In one aspect, the memory device includes a first bit line extending along a direction. The first bit line may be coupled to a subset of the set of memory cells disposed along the direction. In one aspect, the memory device includes a second bit line extending along the direction. In one aspect, the memory device includes a switch coupled between the first bit line and the second bit line.
    Type: Application
    Filed: February 16, 2023
    Publication date: March 28, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Yu Lin, Yi-Hsin Nien, Hidehiro Fujiwara, Yen-Huei Chen
  • Patent number: 11942420
    Abstract: A semiconductor device includes a first gate structure extending along a first lateral direction. The semiconductor device includes a first interconnect structure, disposed above the first gate structure, that extends along a second lateral direction perpendicular to the first lateral direction. The first interconnect structure includes a first portion and a second portion electrically isolated from each other by a first dielectric structure. The semiconductor device includes a second interconnect structure, disposed between the first gate structure and the first interconnect structure, that electrically couples the first gate structure to the first portion of the first interconnect structure. The second interconnect structure includes a recessed portion that is substantially aligned with the first gate structure and the dielectric structure along a vertical direction.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: March 26, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Guo-Huei Wu, Hui-Zhong Zhuang, Chih-Liang Chen, Cheng-Chi Chuang, Shang-Wen Chang, Yi-Hsun Chiu
  • Publication number: 20240085678
    Abstract: Various embodiments of the present disclosure are directed towards a camera module comprising flat lenses. Flat lenses have reduced thicknesses compared to other types of lenses, whereby the camera module may have a small size and camera bumps may be omitted or reduced in size on cell phones and the like incorporating the camera module. The flat lenses are configured to focus visible light into a beam of white light, split the beam into sub-beams of red, green, and blue light, and guide the sub-beams respectively to separate image sensors for red, green, and blue light. The image sensors generate images for corresponding colors and the images are combined into a full-color image. Optically splitting the beam into the sub-beams and using separate image sensors for the sub-beams allows color filters to be omitted and smaller pixel sensors. This, in turn, allows higher quality imaging.
    Type: Application
    Filed: May 8, 2023
    Publication date: March 14, 2024
    Inventors: Jung-Huei Peng, Chun-Wen Cheng, Yi-Chien Wu, Tsun-Hsu Chen
  • Patent number: 11929116
    Abstract: A memory device and a method for operating the memory device are provided. The memory device includes a memory cell and a bit line connected to the memory cell. A negative voltage generator is connected to the bit line. The negative voltage generator, when enabled, is operative to provide a first write path for the bit line. A control circuit is connected to the negative voltage generator and the bit line. The control circuit is operative to provide a second write path for the bit line when the negative voltage generator is not enabled.
    Type: Grant
    Filed: January 23, 2023
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Hsin Nien, Hidehiro Fujiwara, Chih-Yu Lin, Yen-Huei Chen
  • Publication number: 20110175848
    Abstract: An IR touch panel device includes a housing, a plurality of first IR receivers, a first IR transmitter, a plurality of second IR receivers and a second IR transmitter. The plurality of first IR receivers are installed on a bottom side of the housing; the first IR transmitter is installed on a top side of the housing, transmission range of the first IR transmitter covering the plurality of first IR receivers; the plurality of second IR receivers are installed on a right side of the housing; the second IR transmitter is installed on a left side of the housing, transmission range of the second IR transmitter covering the plurality of second IR receivers. A user may control operation of the IR touch panel device through blocking a path between the IR transmitter and the IR receiver.
    Type: Application
    Filed: March 30, 2010
    Publication date: July 21, 2011
    Inventor: Yi-Huei Chen
  • Publication number: 20090134858
    Abstract: A voltage regulating apparatus and method and voltage regulator thereof are presented. The apparatus includes a first regulator and a second regulator. The first regulator is used for receiving an input voltage and outputting a first voltage according to the input voltage. When the input voltage reaches a steady voltage value, the second regulator is turned on so as to receive the first voltage provided by the first regulator and output a second voltage according to the first voltage or the input voltage.
    Type: Application
    Filed: November 24, 2008
    Publication date: May 28, 2009
    Inventors: Yi-Huei CHEN, Chao-Cheng LEE
  • Patent number: 7430235
    Abstract: An apparatus for providing a multi-mode interface between a baseband receiver and radio frequency (RF) circuitry. According to a preferred embodiment of the invention, the apparatus includes a first differential-to-single-ended converter, a second differential-to-single-ended converter and an analog-to-digital converter. The first differential-to-single-ended converter receives an incoming differential current pair to be converted into a first single-ended voltage signal. The second differential-to-single-ended converter receives an incoming differential voltage pair to be converted into a second single-ended voltage signal. Further, the analog-to-digital converter selectively receives an incoming single-ended voltage signal, the first single-ended voltage signal, or the second single-ended voltage signal to be converted into a digital signal to be further processed by the baseband processor.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: September 30, 2008
    Assignee: Mediatek Inc.
    Inventors: Tai-Yuan Cheng, Yi-Huei Chen, Jui-Hsi Cheng, Tsung-Liang Lin, Shu-Ping Hsu
  • Patent number: 7088789
    Abstract: An apparatus for providing a multi-mode interface between a baseband receiver and radio frequency (RF) circuitry. According to a preferred embodiment of the invention, the apparatus includes a first differential-to-single-ended converter, a second differential-to-single-ended converter and an analog-to-digital converter. The first differential-to-single-ended converter receives an incoming differential current pair to be converted into a first single-ended voltage signal. The second differential-to-single-ended converter receives an incoming differential voltage pair to be converted into a second single-ended voltage signal. Further, the analog-to-digital converter selectively receives an incoming single-ended voltage signal, the first single-ended voltage signal, or the second single-ended voltage signal to be converted into a digital signal to be further processed by the baseband processor.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: August 8, 2006
    Assignee: Mediatek Inc.
    Inventors: Tai-Yuan Cheng, Yi-Huei Chen, Jui-Hsi Cheng, Tsung-Liang Lin, Shu-Ping Hsu
  • Publication number: 20060126758
    Abstract: An apparatus for providing a multi-mode interface between a baseband receiver and radio frequency (RF) circuitry. According to a preferred embodiment of the invention, the apparatus includes a first differential-to-single-ended converter, a second differential-to-single-ended converter and an analog-to-digital converter. The first differential-to-single-ended converter receives an incoming differential current pair to be converted into a first single-ended voltage signal. The second differential-to-single-ended converter receives an incoming differential voltage pair to be converted into a second single-ended voltage signal. Further, the analog-to-digital converter selectively receives an incoming single-ended voltage signal, the first single-ended voltage signal, or the second single-ended voltage signal to be converted into a digital signal to be further processed by the baseband processor.
    Type: Application
    Filed: February 8, 2006
    Publication date: June 15, 2006
    Inventors: Tai-Yuan Cheng, Yi-Huei Chen, Jui-Hsi Cheng, Tsung-Liang Lin, Shu-Ping Hsu
  • Patent number: 6853323
    Abstract: A digital-to-analog converter (DAC) for use in high-speed wireless communications. The DAC of the invention comprises a plurality of current steering cells to bi-directionally provide a differential current output. When the DAC sets the differential current output to zero for example, each of the current steering cells establishes dummy branches between a pair of current sources and thereby prevents the current sources from floating. This in turn enables the DAC to operate with a higher update rate.
    Type: Grant
    Filed: May 4, 2004
    Date of Patent: February 8, 2005
    Assignee: Integrated Programmable Communications, Inc.
    Inventors: Yi-Huei Chen, Po-Chiun Huang, Chieh-Hung Chen
  • Patent number: 6717474
    Abstract: A differential to single-ended converter, which is composed of a transconductance amplifier, a current mirror and buffer circuit and a transimpedance stage, is disclosed. A differential voltage signal is provided to the inputs of the transconductance amplifier and converted to a differential current signal. The current mirror and buffer circuit serves as a differential to single-ended current conveyer and isolates the transconductance stage and the following transimpedance stage. Finally, the single-ended current signal is provided to the input of the transimpedance stage and converted to a single-ended current signal.
    Type: Grant
    Filed: April 2, 2002
    Date of Patent: April 6, 2004
    Assignee: Integrated Programmable Communications, Inc.
    Inventors: Yi-Huei Chen, Po-Chiun Huang
  • Publication number: 20040013179
    Abstract: An apparatus for providing a multi-mode interface between a baseband transmitter and radio frequency (RF) circuitry. According to a preferred embodiment of the invention, the apparatus includes a digital-to-analog converter, a single-ended-to-differential converter and a voltage-to-current converter. The digital-to-analog converter receives the digital signal from a baseband processor and converts the digital signal into a single-ended voltage signal. The single-ended-to-differential converter receives the single-ended voltage signal and converts it into a pair of differential voltage signals. Further, the voltage-to-current converter receives the pair of differential voltage signals and converts the voltage signal pair into a pair of differential current signals. Thus, the digital signal, the single-ended voltage signal, the differential voltage signal pair and the differential current signal pair together form the multi-mode interface to the RF circuitry.
    Type: Application
    Filed: November 18, 2002
    Publication date: January 22, 2004
    Inventors: Tai-Yuan Cheng, Yi-Huei Chen, Jui-Hsi Cheng, Tsung-Liang Lin, Shu-Ping Hsu
  • Publication number: 20040013181
    Abstract: An apparatus for providing a multi-mode interface between a baseband receiver and radio frequency (RF) circuitry. According to a preferred embodiment of the invention, the apparatus includes a first differential-to-single-ended converter, a second differential-to-single-ended converter and an analog-to-digital converter. The first differential-to-single-ended converter receives an incoming differential current pair to be converted into a first single-ended voltage signal. The second differential-to-single-ended converter receives an incoming differential voltage pair to be converted into a second single-ended voltage signal. Further, the analog-to-digital converter selectively receives an incoming single-ended voltage signal, the first single-ended voltage signal, or the second single-ended voltage signal to be converted into a digital signal to be further processed by the baseband processor.
    Type: Application
    Filed: November 18, 2002
    Publication date: January 22, 2004
    Inventors: Tai-Yuan Cheng, Yi-Huei Chen, Jui-Hsi Cheng, Tsung-Liang Lin, Shu-Ping Hsu
  • Publication number: 20030141935
    Abstract: A differential to single-ended converter, which is composed of a transconductance amplifier, a current mirror and buffer circuit and a transimpedance stage, is disclosed. A differential voltage signal is provided to the inputs of the transconductance amplifier and converted to a differential current signal. The current mirror and buffer circuit serves as a differential to single-ended current conveyer and isolates the transconductance stage and the following transimpedance stage. Finally, the single-ended current signal is provided to the input of the transimpedance stage and converted to a single-ended current signal.
    Type: Application
    Filed: April 2, 2002
    Publication date: July 31, 2003
    Inventors: Yi-Huei Chen, Po-Chiun Huang