Abstract: Electric vehicle charging management methods and systems are provided. A server performs a charging scheduling operation for each electric vehicle charging station to determine a specific time point for each electric vehicle charging station to perform a charging operation in which the charging operation is to charge an electric vehicle coupled with the electric vehicle charging station. When the charging operation corresponding to each electric vehicle charging station is being performed, each electric vehicle charging station transmits charging information corresponding to the charging operation to the server through a network.

Abstract: The present disclosure describes structures and methods for a via structure for three-dimensional integrated circuit (IC) packaging. The via structure includes a middle portion that extends through a planar structure and a first end and a second end each connected to the middle portion and on a different side of the planar structure. One or more of the first end and the second end includes one or more of a plurality of vias and a pseudo metal layer.

Abstract: An image processing method for a video processor for generating an interpolated frame includes steps of: receiving a segmentation map comprising a plurality of segmentation flags; generating an original motion vector (MV) for a first block of the interpolated frame; determining whether to label the first block as a segmentation boundary according to the plurality of segmentation flags in an area corresponding to the first block; generating a correction MV for the first block when the first block is labeled as the segmentation boundary; determining whether the first block is in a cover area or an uncover area according to the correction MV; and selecting a final MV for a specific pixel of the first block from the original MV and the correction MV according to the segmentation map and according to whether the first block is determined to be in the cover area or the uncover area.

Abstract: The present disclosure provides an electronic device including a redistribution layer, a plurality of passive components, and an electronic component. The redistribution layer includes a first insulating layer, a second insulating layer, and a plurality of traces electrically connected to each other through a first opening of the first insulating layer and a second opening of the second insulating layer, wherein the first insulating layer has a first side away from the second insulating layer, and the second insulating layer has a second side away from the first insulating layer. The passive components are disposed on the first side. The electronic component is disposed on the second side. The plurality of passive components are electrically connected to the electronic component through the plurality of traces.

Abstract: An image processing method for a video processor, for generating an extrapolated frame according to a previous frame and a current frame, includes steps of: projecting a plurality of motion vectors (MVs) to the extrapolated frame subsequent to the current frame; determining whether a block of the extrapolated frame is projected by at least two of the MVs; selecting at least two candidate MVs from the MVs projected to the block when the block is projected by at least two of the MVs; calculating a blended MV which is a mixture of the at least two candidate MVs, and projecting the blended MV to the previous frame; obtaining a reference MV corresponding to position of the previous frame projected by the blended MV; and comparing the reference MV with the at least two candidate MVs, to select a final MV for the block from the at least two candidate MVs.

Abstract: A frame rate up-conversion (FRC) apparatus and an operation method thereof are provided. A motion vector (MV) generation circuit provides an MV of a current pixel of an interpolation frame. According to the MV, a data fetch circuit fetches first original data of a first pixel in a first original frame and second original data of a second pixel in a second original frame. According to a position of the first pixel in the first original frame and a position of the second pixel in the second original frame, a boundary processing circuit processes the first original data and the second original data to generate first processed data and second processed data. An interpolation frame generating circuit generates pixel data of the current pixel of the interpolation frame according to the first processed data and the second processed data.

Abstract: A frame rate up-conversion (FRC) apparatus and an operation method thereof are provided. A motion vector (MV) generation circuit provides an MV of a current pixel of an interpolation frame. According to the MV, a data fetch circuit fetches first original data of a first pixel in a first original frame and second original data of a second pixel in a second original frame. According to a position of the first pixel in the first original frame and a position of the second pixel in the second original frame, a boundary processing circuit processes the first original data and the second original data to generate first processed data and second processed data. An interpolation frame generating circuit generates pixel data of the current pixel of the interpolation frame according to the first processed data and the second processed data.

Abstract: An upgrading apparatus provides upgrading function for a portable computer. The portable computer has a body, a display, a keyboard and a motherboard. The upgrading apparatus comprises an accommodating chamber placed at predetermined location of the body; an expansion unit in the accommodating unit; and an upgrading graphic card connected to the expansion unit. The expansion unit is electrically connected to the motherboard whereby a user can update the function of the portable computer by assembling the upgrading graphic card to the expansion unit and connecting the expansion unit to the motherboard.