Patents by Inventor Yi-Hung Lee

Yi-Hung Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200241605
    Abstract: A hinge module and an electronic device are provided. The electronic device includes a first body and a second body that the hinge module is connected therebetween, and the first and the second bodies are rotated to be folded or unfolded through the hinge module. The hinge module includes a guiding member, a first rail, a rotating shaft, and a linking member. The rotating shaft disposed at the first body in a rotatable and penetrating manner. The linking member is linked between the rotating shaft and the guiding member. The first and the second bodies are rotated relatively to each other via the guiding member and the first rail, and the guiding member drives the linking member to rotate the rotating shaft.
    Type: Application
    Filed: April 14, 2020
    Publication date: July 30, 2020
    Applicants: Acer Incorporated, Sinher Technology Inc.
    Inventors: Yan-Fong Cheng, Cheng-Nan Ling, Yi-Ta Huang, Pao-Min Huang, Ting-Hung Su, Yung-Chang Chiang, Shin-Pin Yang, Wu-Chen Lee
  • Patent number: 10727588
    Abstract: A mobile device includes a main circuit board, a PCB (Printed Circuit Board), a feeding connection element, a grounding connection element, a first radiation element, a second radiation element, a third radiation element, a fourth radiation element, and a fifth radiation element. The first radiation element is coupled to the feeding connection element. The second radiation element is coupled to the feeding connection element. The third radiation element is coupled to the grounding connection element. The fourth radiation element is coupled to the first radiation element. The fifth radiation element is coupled to the feeding connection element. The feeding connection element, the grounding connection element, the first radiation element, and the second radiation element are disposed on the main circuit board. The third radiation element, the fourth radiation element, and the fifth radiation element are disposed on the PCB.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: July 28, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventors: Ying-Cong Deng, Chung-Hung Lo, Chin-Lung Tsai, Ching-Hai Chiang, Kuan-Hsien Lee, Yi-Ling Tseng, Chung-Ting Hung
  • Patent number: 10707213
    Abstract: A method of forming a layout of a semiconductor device includes the following steps. First line patterns extend along a first direction in a first area and a second area, but the first line patterns extend along a second direction in a boundary area. Second line patterns extend along a third direction in the first area and the second area, but the second line patterns extend along a fourth direction in the boundary area, so that minimum distances between overlapping areas of the first line patterns and the second line patterns in the boundary area are larger than minimum distances between overlapping areas of the first line patterns and the second line patterns in the first area and the second area. A trimming process is performed to shade the first line patterns and the second line patterns in the boundary area and the second area.
    Type: Grant
    Filed: November 1, 2018
    Date of Patent: July 7, 2020
    Assignees: UNITED MICROELECTRONICS CORP., Fujian Jinhua Integrated Circuit Co., Ltd.
    Inventors: Chia-Hung Wang, En-Chiuan Liou, Chien-Hao Chen, Sho-Shen Lee, Yi-Ting Chen, Jhao-Hao Lee
  • Publication number: 20200209018
    Abstract: A code disk is adapted to an optical absolute rotary encoder. The code disk is divided into a plurality of columns, with the plurality of columns disposed in a circumferential direction around a center position and respectively extending in a plurality of radial directions. The code disk comprises a plurality of disk sectors sequentially disposed in the circumferential direction around the center position, wherein each of the disk sectors comprises a plurality of code pieces, each of the code pieces comprises an encoded value, each of the encoded values comprises a plurality of bits adopting Manchester code, these bits are arranged in one of the radial directions, and the encoded values of two of the disk sectors are arranged as Gray code.
    Type: Application
    Filed: June 5, 2019
    Publication date: July 2, 2020
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ming-Chieh CHOU, Kuo-Chih WANG, Chi-Hung LEE, Yi-Cheng CHEN
  • Patent number: 10668511
    Abstract: A method of cleaning a process chamber includes following steps. A plurality of process films and a plurality of non-process films are alternately formed on an interior surface of the process chamber. A cleaning operation is performed to remove the plurality of process films and the plurality of non-process films from the interior surface of the process chamber.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: June 2, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Lin Lee, Yi-Ming Lin, Chih-Hung Yeh, Zi-Yuang Wang
  • Publication number: 20200168527
    Abstract: A device, such as a computer system, includes an interconnection device die and at least two additional device dice. The additional device dies can be system on integrated chip (SOIC) dies laying face to face (F2F) on the interconnection device die. The interconnection device die includes electrical connectors on one surface, enabling connection to and/or among the additional device dice. The interconnection device die includes at least one redistribution circuit structure, which may be an integrated fan out (InFO) structure, and at least one through-silicon via (TSV). The TSV enables connection between a signal line, power line or ground line, from an opposite surface of the interconnection device die to the redistribution circuit structure and/or electrical connectors. At least one of the additional dice can be a three-dimensional integrated circuit (3DIC) die with face to back (F2B) stacking.
    Type: Application
    Filed: September 6, 2019
    Publication date: May 28, 2020
    Applicant: Taiwan Semiconductor Manfacturing Co., Ltd.
    Inventors: Fong-Yuan CHANG, Chin-Chou LIU, Chin-Her CHIEN, Cheny-hung YEH, Hui Yu LEE, Po-Hsiang HUANG, Yi-Kan CHENG
  • Publication number: 20200169642
    Abstract: A scanning device includes an outer shell, a glass platform, a contact image sensor, a paper feeding unit and an upper cover. An inside of the outer shell has an accommodating space. The glass platform is disposed to the outer shell. The glass platform includes an automatic paper fed and scanned area, and a static paper scan area. The contact image sensor is disposed in the accommodating space. The paper feeding unit is disposed to a top surface of the automatic paper fed and scanned area. The upper cover is pivotally disposed to a top surface of the static paper scan area. A top surface of the upper cover is recessed downward to form a paper loading groove.
    Type: Application
    Filed: October 30, 2019
    Publication date: May 28, 2020
    Inventors: Chi Wen Chen, Wei Xiang Tsai, Hsing Hung Lee, Yi Hsuan Lin
  • Patent number: 10666438
    Abstract: A memory storage device is fabricated using a semiconductor fabrication process. Often times, manufacturing variations and/or misalignment tolerances present within the semiconductor fabrication process can cause the memory storage device to differ from other memory storage devices similarly designed and fabricated by the semiconductor fabrication process. For example, uncontrollable random physical processes in the semiconductor fabrication process can cause small differences, such as differences in doping concentrations, oxide thicknesses, channel lengths, structural widths, and/or parasitics to provide some examples, between these memory storage devices. These small differences can cause bitlines within the memory storage device to be physically unique with no two bitlines being identical. As a result, the uncontrollable random physical processes in the semiconductor fabrication process can cause electronic data read from the memory storage device to propagate along the bitlines at different rates.
    Type: Grant
    Filed: October 15, 2018
    Date of Patent: May 26, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jui-Che Tsai, Cheng Hung Lee, Shih-Lien Linus Lu, Yi-Ju Chen
  • Patent number: 10665550
    Abstract: The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to a semiconductor interposer device. The semiconductor interposer device includes a substrate and a first metallization layer formed on the substrate. A first dielectric layer is formed on the first metallization layer and a second metallization layer is formed on the substrate. A first conducting line is formed in the first metallization layer and second and third conducting lines are formed in the second metallization layer. A metal-insulator-metal (MIM) capacitor is formed in the first dielectric layer and over the first conducting line.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: May 26, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hui Yu Lee, Chin-Chou Liu, Cheng-Hung Yeh, Fong-Yuan Chang, Po-Hsiang Huang, Yi-Kan Cheng, Ka Fai Chang
  • Publication number: 20200161100
    Abstract: An apparatus for PVD is provided. The apparatus includes a chamber, a pedestal disposed in the chamber to accommodate a wafer, and a ring. The ring includes a ring body having a first top surface and a second top surface, and a barrier structure disposed between the first top surface and the second top surface. The barrier structure can further include at least a first portion and a second portion separated from each other. The second vertical distance is equal to or greater than the first vertical distance.
    Type: Application
    Filed: October 15, 2019
    Publication date: May 21, 2020
    Inventors: HSIN-LIANG CHEN, WEN-CHIH WANG, CHIA-HUNG LIAO, CHENG-CHIEH CHEN, YI-MING YEH, HUNG-TING LIN, YUNG-YAO LEE
  • Patent number: 10656685
    Abstract: A hinge module and an electronic device are provided. The electronic device includes a first body and a second body that the hinge module is connected therebetween, and the first and the second bodies are rotated to be folded or unfolded through the hinge module. The hinge module includes a guiding member, a first rail, a rotating shaft, and a linking member. The rotating shaft disposed at the first body in a rotatable and penetrating manner. The linking member is linked between the rotating shaft and the guiding member. The first and the second bodies are rotated relatively to each other via the guiding member and the first rail, and the guiding member drives the linking member to rotate the rotating shaft.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: May 19, 2020
    Assignees: Acer Incorporated, Sinher Technology Inc.
    Inventors: Yan-Fong Cheng, Cheng-Nan Ling, Yi-Ta Huang, Pao-Min Huang, Ting-Hung Su, Yung-Chang Chiang, Shin-Pin Yang, Wu-Chen Lee
  • Patent number: 10659393
    Abstract: A method for monitoring traffic in a network is provided. The method is used in a communication device, wherein the network is formed by switches and hosts. The method includes: collecting LLDP information, VLAN information, host NIC information and host-tenant mapping information to obtain a physical network topology and a plurality of virtual network topologies; detecting a plurality of physical link loads of the physical network topology; obtaining a target path between two of the hosts or between the switches by analyzing the virtual network topologies; selecting one of the switches on the target path to serve as a mirror switch according to the physical link load corresponding to the target path or a hop count; and receiving mirror traffic transmitted from the mirror switch, and performing packet payload analysis on the mirror traffic.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: May 19, 2020
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Ming-Hung Hsu, Tzi-Cker Chiueh, Yu-Wei Lee, Yi-An Chen
  • Patent number: 10658026
    Abstract: Devices and methods are provided for word line pulse width control for a static random access memory (SRAM) devices. An inverter within a pre-decoder circuit receives a first input of a clocked address. The inverter determines an output based on the clocked address. An electrical load of a decoder driver circuit of the SRAM device is modified based on the output. Current to a transistor coupled at a common node is provided. The transistor is configured to electrically couple a plurality of transistors of the decoder driver circuit within the SRAM device.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: May 19, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Anjana Singh, Cheng Hung Lee, Hau-Tai Shieh, Yi-Tzu Chen
  • Publication number: 20200136251
    Abstract: A mobile device includes a main circuit board, a PCB (Printed Circuit Board), a feeding connection element, a grounding connection element, a first radiation element, a second radiation element, a third radiation element, a fourth radiation element, and a fifth radiation element. The first radiation element is coupled to the feeding connection element. The second radiation element is coupled to the feeding connection element. The third radiation element is coupled to the grounding connection element. The fourth radiation element is coupled to the first radiation element. The fifth radiation element is coupled to the feeding connection element. The feeding connection element, the grounding connection element, the first radiation element, and the second radiation element are disposed on the main circuit board. The third radiation element, the fourth radiation element, and the fifth radiation element are disposed on the PCB.
    Type: Application
    Filed: February 26, 2019
    Publication date: April 30, 2020
    Inventors: Ying-Cong DENG, Chung-Hung LO, Chin-Lung TSAI, Ching-Hai CHIANG, Kuan-Hsien LEE, Yi-Ling TSENG, Chung-Ting HUNG
  • Publication number: 20200127935
    Abstract: A resource adjusting and controlling method includes: monitoring, by a plurality of monitoring units of a server, one of a plurality of monitoring tags; monitoring usage statuses of the queues corresponding to the monitoring units, and determining if one of the monitoring units performs a queue space adjustment based on the usage statuses; adding the obtained new data to a corresponding one of the queues of the one of the monitoring units if the queue space adjustment is not performed; adjusting space of the one or more of the queues if the queue space adjustment is performed and one or more of the queues have a space that is adjustable; and reducing data stored in the corresponding one of the queues, if the queue space adjustment is performed and no space in the queues is adjustable.
    Type: Application
    Filed: December 26, 2018
    Publication date: April 23, 2020
    Inventors: Tsung-Sheng Cheng, Yi-Hung Lu, Kuen-Min Lee, Mu-Kai Huang, Wan-Ting Hong
  • Publication number: 20200123656
    Abstract: A system and method for plasma enhanced deposition processes. An exemplary semiconductor manufacturing system includes a susceptor configured to hold a semiconductor wafer and a sector disposed above the susceptor. The sector includes a first plate and an overlying second plate, operable to form a plasma there between. The first plate includes a plurality of holes extending through the first plate, which vary in at least one of diameter and density from a first region of the first plate to a second region of the first plate.
    Type: Application
    Filed: December 20, 2019
    Publication date: April 23, 2020
    Inventors: Kun-Mo LIN, Yi-Hung LIN, Jr-Hung LI, Tze-Liang LEE, Ting-Gang CHEN, Chung-Ting KO
  • Publication number: 20200111791
    Abstract: A method of forming a layout of a semiconductor device includes the following steps. First line patterns extend along a first direction in a first area and a second area, but the first line patterns extend along a second direction in a boundary area. Second line patterns extend along a third direction in the first area and the second area, but the second line patterns extend along a fourth direction in the boundary area, so that minimum distances between overlapping areas of the first line patterns and the second line patterns in the boundary area are larger than minimum distances between overlapping areas of the first line patterns and the second line patterns in the first area and the second area. A trimming process is performed to shade the first line patterns and the second line patterns in the boundary area and the second area.
    Type: Application
    Filed: November 1, 2018
    Publication date: April 9, 2020
    Inventors: Chia-Hung Wang, En-Chiuan Liou, Chien-Hao Chen, Sho-Shen Lee, Yi-Ting Chen, Jhao-Hao Lee
  • Patent number: 10615490
    Abstract: A wearable device worn by a user includes a base, an antenna structure, a ground plane, and a metal element. The base substantially has a hollow structure. The antenna structure is disposed on the base. The ground plane is disposed inside the base. The metal element is adjacent to the ground plane. The ground plane is positioned between the antenna structure and the metal element.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: April 7, 2020
    Assignee: QUANTA COMPUTER INC.
    Inventors: Chung-Hung Lo, Chung-Ting Hung, Chin-Lung Tsai, Ching-Hai Chiang, Kuan-Hsien Lee, Ying-Cong Deng, Yi-Ling Tseng
  • Patent number: 10598977
    Abstract: A display apparatus including a display, a prism module and a filter layer is provided. The prism module is disposed on the display. The prism module includes a transparent substrate and a plurality of prism structures. The prism structures are located on the transparent substrate, and a plurality of tips of the prism structures is located away from the display. The filter layer is disposed between the prism module and the display, or the prism module is disposed between the filter layer and the display.
    Type: Grant
    Filed: July 27, 2017
    Date of Patent: March 24, 2020
    Assignee: CHAMP VISION DISPLAY INC.
    Inventors: Jhong-Hao Wu, Chin-Ku Liu, Fa-Chih Liu, Yi-Yu Tsai, Hsin-Hung Lee, Chiao-Chih Yang
  • Patent number: D891439
    Type: Grant
    Filed: May 14, 2018
    Date of Patent: July 28, 2020
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Shang-Che Lee, I-Lung Chen, Yi-Hsuan Wu, Wang-Hung Yeh