Patents by Inventor Yi-Jen Chiu

Yi-Jen Chiu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10882453
    Abstract: A system, method, and computer readable medium may include technology to enable optimal usage of automotive virtual mirrors. A gaze detector monitors a driver's eyes to determine if the driver is looking in the direction of a virtual mirror. If the driver is not looking in the direction of virtual mirror, all virtual mirrors are placed in a low operational mode. If the driver is looking in the direction of a virtual mirror, the virtual mirror being viewed is placed in a high operational mode and all other virtual mirrors are placed in the low operational mode.
    Type: Grant
    Filed: April 1, 2017
    Date of Patent: January 5, 2021
    Assignee: Intel Corporation
    Inventors: Jill M. Boyce, Stanley J. Baran, Sumit Mohan, Jason Tanner, Yi-Jen Chiu, Atthar H. Mohammed
  • Patent number: 10873755
    Abstract: Techniques related to motion estimation with neighbor block pattern for video coding.
    Type: Grant
    Filed: June 9, 2016
    Date of Patent: December 22, 2020
    Assignee: Intel Corporation
    Inventors: Zhipin Deng, Iole Moccagatta, Lidong Xu, Wenhao Zhang, Yi-Jen Chiu
  • Patent number: 10872230
    Abstract: Methods and systems may provide for facial recognition of at least one input image utilizing hierarchical feature learning and pair-wise classification. Receptive field theory may be used on the input image to generate a pre-processed multi-channel image. Channels in the pre-processed image may be activated based on the amount of feature rich details within the channels. Similarly, local patches may be activated based on the discriminant features within the local patches. Features may be extracted from the local patches and the most discriminant features may be selected in order to perform feature matching on pair sets. The system may utilize patch feature pooling, pair-wise matching, and large-scale training in order to quickly and accurately perform facial recognition at a low cost for both system memory and computation.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: December 22, 2020
    Assignee: Intel Corporation
    Inventors: Jianguo Li, Yurong Chen, Ke Chen, Yi-Jen Chiu
  • Publication number: 20200393642
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly, a driving assembly and a stopping assembly. The fixed assembly has a main axis. The movable assembly is configured to connect an optical element, and the movable assembly is movable relative to the fixed assembly. The driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The stopping assembly is configured to limit the movement of the movable assembly relative to the fixed assembly within a range of motion.
    Type: Application
    Filed: June 12, 2020
    Publication date: December 17, 2020
    Inventors: Chao-Chang HU, Liang-Ting HO, Chen-Er HSU, Yi-Liang CHAN, Fu-Lai TSENG, Fu-Yuan WU, Chen-Chi KUO, Ying-Jen WANG, Wei-Han HSIA, Yi-Hsin TSENG, Wen-Chang LIN, Chun-Chia LIAO, Shou-Jen LIU, Chao-Chun CHANG, Yi-Chieh LIN, Shang-Yu HSU, Yu-Huai LIAO, Shih-Wei HUNG, Sin-Hong LIN, Kun-Shih LIN, Yu-Cheng LIN, Wen-Yen HUANG, Wei-Jhe SHEN, Chih-Shiang WU, Sin-Jhong SONG, Che-Hsiang CHIU, Sheng-Chang LIN
  • Patent number: 10863194
    Abstract: Method and apparatus for deriving a motion vector at a video decoder. A block-based motion vector may be produced at the video decoder by utilizing motion estimation among available pixels relative to blocks in one or more reference frames. The available pixels could be, for example, spatially neighboring blocks in the sequential scan coding order of a current frame, blocks in a previously decoded frame, or blocks in a downsampled frame in a lower pyramid when layered coding has been used.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: December 8, 2020
    Assignee: Intel Corporation
    Inventors: Yi-Jen Chiu, Lidong Xu, Hong Jiang
  • Publication number: 20200357765
    Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes steps of providing a first wafer including a first substrate and a plurality of first conductors over the first substrate; forming a first interconnect structure penetrating through the first substrate and contacting one of the first conductors; forming a bonding dielectric on the first substrate and the first interconnect structure; bonding a second wafer on the first wafer, wherein the second wafer includes a second substrate, a second ILD layer on a second front surface of the second substrate, and a plurality of second conductors in the second ILD layer, wherein the second ILD layer is in contact with the bonding dielectric; forming a second interconnect structure penetrating through the second substrate and into the second ILD layer and contacting the second conductor and the first interconnect structure.
    Type: Application
    Filed: May 7, 2019
    Publication date: November 12, 2020
    Inventors: PEI-JHEN WU, HSIH-YANG CHIU, CHIANG-LIN SHIH, CHING-HUNG CHANG, YI-JEN LO
  • Patent number: 10811382
    Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes steps of providing a first wafer including a first substrate and a plurality of first conductors over the first substrate; forming a first interconnect structure penetrating through the first substrate and contacting one of the first conductors; forming a bonding dielectric on the first substrate and the first interconnect structure; bonding a second wafer on the first wafer, wherein the second wafer includes a second substrate, a second ILD layer on a second front surface of the second substrate, and a plurality of second conductors in the second ILD layer, wherein the second ILD layer is in contact with the bonding dielectric; forming a second interconnect structure penetrating through the second substrate and into the second ILD layer and contacting the second conductor and the first interconnect structure.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: October 20, 2020
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Pei-Jhen Wu, Hsih-Yang Chiu, Chiang-Lin Shih, Ching-Hung Chang, Yi-Jen Lo
  • Publication number: 20200327702
    Abstract: Techniques related to accelerated video enhancement using deep learning selectively applied based on video codec information are discussed. Such techniques include applying a deep learning video enhancement network selectively to decoded non-skip blocks that are in low quantization parameter frames, bypassing the deep learning network for decoded skip blocks in low quantization parameter frames, and applying non-deep learning video enhancement to high quantization parameter frames.
    Type: Application
    Filed: June 26, 2020
    Publication date: October 15, 2020
    Applicant: INTEL CORPORATION
    Inventors: Chen Wang, Ximin Zhang, Huan Dou, Yi-Jen Chiu, Sang-Hee Lee
  • Patent number: 10802217
    Abstract: An optical waveguide structure and a manufacturing method thereof are provided. The optical waveguide structure includes: a substrate; a first-type semiconductor conductive layer disposed on the substrate; a first confining layer disposed on the first-type semiconductor conductive layer; a waveguide layer disposed on the first confining layer and including a luminescent material; a polymer filling layer disposed on the first confining layer and adjacent to the waveguide layer, wherein the viscosity of the polymer filling layer is less than 52 mm2/s; a second confining layer disposed on the waveguide layer and the polymer filling layer; a cladding layer disposed on the second confining layer; and a second-type semiconductor conductive layer disposed on the cladding layer.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: October 13, 2020
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Jia-Ren Zou, Yi-Jen Chiu, Rih-You Chen, Cong-Long Chen
  • Publication number: 20200304710
    Abstract: Systems, apparatuses and methods may determine, on a per camera basis, an interest level with respect to panoramic video content, identify a subset of cameras in a plurality of cameras for which the interest level is below a threshold, and reduce power consumption in the subset of cameras. Additionally, technology may determine a projection format associated with panoramic video content, identify one or more discontinuous boundaries in the projection format, and modify an encoding scheme associated with the panoramic video content based on the discontinuous boundaries. Moreover, an encoded frame may be assigned to a temporal scalability layer that has a higher priority than a layer to which an asynchronous space warp frame is assigned. Additionally, technology may reduce the encoding complexity of a boundary between an active region and an inactive region in fisheye content.
    Type: Application
    Filed: March 4, 2020
    Publication date: September 24, 2020
    Inventors: Jill M. Boyce, Stanley J. Baran, Sumit Mohan, Yi-Jen Chiu, Jason Tanner, Atthar H. Mohammed, Richmond Hicks, Barnan Das
  • Publication number: 20200284982
    Abstract: An optical waveguide structure and a manufacturing method thereof are provided. The optical waveguide structure includes: a substrate; a first-type semiconductor conductive layer disposed on the substrate; a first confining layer disposed on the first-type semiconductor conductive layer; a waveguide layer disposed on the first confining layer and including a luminescent material; a polymer filling layer disposed on the first confining layer and adjacent to the waveguide layer, wherein the viscosity of the polymer filling layer is less than 52 mm2/s; a second confining layer disposed on the waveguide layer and the polymer filling layer; a cladding layer disposed on the second confining layer; and a second-type semiconductor conductive layer disposed on the cladding layer.
    Type: Application
    Filed: May 3, 2019
    Publication date: September 10, 2020
    Inventors: Jia-Ren ZOU, Yi-Jen CHIU, Rih-You CHEN, Cong-Long CHEN
  • Patent number: 10764592
    Abstract: Systems, devices and methods are described including performing scalable video coding using inter-layer residual prediction. Inter-layer residual prediction in an enhancement layer coding unit, prediction unit, or transform unit may use residual data obtained from a base layer or from a lower enhancement layer. The residual may be subjected to upsample filtering and/or refinement filtering. The upsample or refinement filter coefficients may be predetermined or may be adoptively determined.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: September 1, 2020
    Assignee: Intel Corporation
    Inventors: Wenhao Zhang, Yi-Jen Chiu, Lidong Xu, Yu Han, Zhipin Deng, Xiaoxia Cai
  • Publication number: 20200226822
    Abstract: An apparatus for content based anti-aliasing is described herein. The apparatus comprises a detector, corrector, and downscaler. The detector is to detect potential aliased content in an input image, wherein the potentially aliased content occurs at a downscaled version of the input image. The corrector is to apply a correction to a single component of the input image. A downscaler may downscale the corrected input image to an output image according to a scaling factor.
    Type: Application
    Filed: March 18, 2020
    Publication date: July 16, 2020
    Applicant: INTEL CORPORATION
    Inventors: Vijay Sundaram, Yi-Jen Chiu
  • Publication number: 20200219229
    Abstract: An apparatus for edge aware upscaling is described herein. The apparatus comprises a potential edge detector, a thin-edge detector, a one-directional edge detector, a correlation detector, and a corrector. The potential edge detector identifies potential edge pixels in an input image, and the thin-edge detector detects thin edges in the potential edge pixels of the input image. The one-directional edge detector detects one-directional edges in the potential edge pixels of the input image, and the correlation detector detects strongly correlated edges in the potential edge pixels of the input image. The corrector derives a target output value based on an edge type and classification of a corresponding input pixel as identified by a source map point.
    Type: Application
    Filed: March 18, 2020
    Publication date: July 9, 2020
    Applicant: INTEL CORPORATION
    Inventors: Vijay Sundaram, Yi-Jen Chiu
  • Publication number: 20200219238
    Abstract: Methods and systems to improve a visual perception of dark scenes in video. An example device includes one or more processors to receive a frame of video segmented into a plurality of sub-regions. A local luminance histogram is generated for each sub-region. A global luminance histogram is generated for the entire frame of video and a global tone mapping curve is generated based on the global luminance histogram. A tone mapping LUT is generated for each sub-region based on the global tone mapping curve and the corresponding local luminance histogram for the sub-region. The frame of video is then modified using the tone mapping LUTs generated for each sub-region and sent to an output device.
    Type: Application
    Filed: March 18, 2020
    Publication date: July 9, 2020
    Inventors: Ya-Ti Peng, Yi-Jen Chiu
  • Publication number: 20200172393
    Abstract: Methods for improving wafer bonding performance are disclosed herein. In some embodiments, a method for bonding a pair of semiconductor substrates is disclosed. The method includes: processing at least one of the pair of semiconductor substrates, and bonding the pair of semiconductor substrates together. Each of the pair of semiconductor substrates is processed by: performing at least one chemical vapor deposition (CVD), and performing at least one chemical mechanical polishing (CMP). One of the at least one CVD is performed after all CMP performed before bonding.
    Type: Application
    Filed: November 26, 2019
    Publication date: June 4, 2020
    Inventors: Chien-Wei CHANG, Ya-Jen SHEUH, Ren-Dou LEE, Yi-Chih CHANG, Yi-Hsun CHIU, Yuan-Hsin CHI
  • Patent number: 10659777
    Abstract: Systems, apparatus and methods are described including determining a prediction residual for a channel of video data; and determining, using the first channel's prediction residual, a prediction residual for a second channel of the video data. Further, a prediction residual for a third channel of the video data may be determined using the second channel's prediction residual.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: May 19, 2020
    Assignee: Intel Corporation
    Inventors: Lidong Xu, Yi-Jen Chiu, Yu Han, Wenhao Zhang
  • Publication number: 20200151964
    Abstract: Systems, apparatus, articles, and methods are described below including operations for scalable real-time face beautification of video images.
    Type: Application
    Filed: October 21, 2019
    Publication date: May 14, 2020
    Inventors: Ke Chen, Zhipin Deng, Xiaoxia Cai, Chen Wang, Ya-Ti Peng, Yi-Jen Chiu, Lidong Xu
  • Patent number: 10644308
    Abstract: An electrode material of a sodium-ion battery, a method of manufacturing the same, and an electrode of the sodium-ion battery are provided. The electrode material of the sodium-ion battery includes an oxide comprising sodium, vanadium, and phosphorus represented by formula 2 below: Na3+x2?yV2(PO4?yFy)3, wherein 0.01?x2?0.99 and 0.01?y?0.3.
    Type: Grant
    Filed: April 2, 2018
    Date of Patent: May 5, 2020
    Assignee: Chung Yuan Christian University
    Inventors: Wei-Jen Liu, Yi-Tang Chiu, Rasu Muruganantham
  • Patent number: 10607321
    Abstract: Techniques related to video processing with adaptive sharpness enhancement are discussed. Such techniques may include determining a detail versus noise score for a video frame based on a noise level, a motion level, an average luma value, and spatial frequency information of the video frame and enhancing sharpness of the video frame based on sharpness enhancement control parameters generated based on the detail versus noise score for the video frame.
    Type: Grant
    Filed: June 22, 2016
    Date of Patent: March 31, 2020
    Assignee: Intel Corporation
    Inventors: Teahyung Lee, Jong Dae Oh, Yi-Jen Chiu