Patents by Inventor Yi-Jen TSAI

Yi-Jen TSAI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240274555
    Abstract: Embodiments provide a method and resulting structure that includes forming an opening in a dielectric layer to expose a metal feature, selectively depositing a metal cap on the metal feature, depositing a barrier layer over the metal cap, and depositing a conductive fill on the barrier layer.
    Type: Application
    Filed: May 8, 2023
    Publication date: August 15, 2024
    Inventors: Wei-Jen Lo, Syun-Ming Jang, Ming-Hsing Tsai, Chun-Chieh Lin, Hung-Wen Su, Ya-Lien Lee, Chih-Han Tseng, Chih-Cheng Kuo, Yi-An Lai, Kevin Huang, Kuan-Hung Ho
  • Publication number: 20240243664
    Abstract: A controller of a buck-boost conversion circuit and a mode switching method thereof are provided. The controller control operations of multiple switches of the buck-boost conversion circuit to convert an input voltage into an output voltage and provide an output current. The controller includes a slope compensation circuit, a control loop, and a mode switching circuit. The slope compensation circuit generates a slope compensation signal according to a mode switching signal of a current cycle. The control loop is coupled to the slope compensation circuit and the switches respectively, and is configured to generate multiple switch control signals according to the slope compensation signal, a feedback voltage related to the output voltage, and a current sense signal related to the output current to control the operations of the switches respectively. The mode switching circuit is coupled to the slope compensation circuit and the control loop.
    Type: Application
    Filed: December 22, 2023
    Publication date: July 18, 2024
    Applicant: uPI Semiconductor Corp.
    Inventors: Yen Hui Wang, Yi-Xian Jan, Chien Hsien Tsai, Kuo-Jen Kuo, Chao-Chung Huang, Cheng-Hsing Li
  • Publication number: 20240088206
    Abstract: A semiconductor structure includes a first electrode, a second electrode over the first electrode, a third electrode over the second electrode, a first insulating layer between the first electrode and the second electrode, and a second insulating layer between the second electrode and the third electrode. The third electrode includes a first bottom surface and a second bottom surface. The first bottom surface and the second bottom surface are at different levels. A width of the first bottom surface is greater than a width of the second bottom surface.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: YI JEN TSAI, YUAN-TAI TSENG, CHERN-YOW HSU
  • Patent number: 11855127
    Abstract: A semiconductor structure includes a first electrode, a second electrode over the first electrode, a third electrode over the second electrode, a first insulating layer between the first electrode and the second electrode, and a second insulating layer between the second electrode and the third electrode. The third electrode includes a first bottom surface and a second bottom surface. The first bottom surface and the second bottom surface are at different levels. A width of the first bottom surface is greater than a width of the second bottom surface.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yi Jen Tsai, Yuan-Tai Tseng, Chern-Yow Hsu
  • Patent number: 11532697
    Abstract: A semiconductor structure includes a substrate, a first electrode over the substrate, a second electrode over the first electrode, and a first insulating layer between the first electrode and the second electrode. The first insulating layer has a first portion and a second portion coupled to the first portion, the second portion of the first insulating layer is in contact with the second electrode, the first portion is separated from the second electrode by the second portion. A thickness of the second portion is greater than a thickness of the first portion.
    Type: Grant
    Filed: October 16, 2019
    Date of Patent: December 20, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yi Jen Tsai, Yuan-Tai Tseng, Chern-Yow Hsu
  • Publication number: 20220336575
    Abstract: A semiconductor structure includes a first electrode, a second electrode over the first electrode, a third electrode over the second electrode, a first insulating layer between the first electrode and the second electrode, and a second insulating layer between the second electrode and the third electrode. The third electrode includes a first bottom surface and a second bottom surface. The first bottom surface and the second bottom surface are at different levels. A width of the first bottom surface is greater than a width of the second bottom surface.
    Type: Application
    Filed: July 5, 2022
    Publication date: October 20, 2022
    Inventors: Yi Jen TSAI, Yuan-Tai TSENG, Chern-Yow HSU
  • Patent number: 11189787
    Abstract: A phase change memory (PCM) cell with a low deviation contact area between a heater and a phase change element is provided. The PCM cell comprises a bottom electrode, a dielectric layer, a heater, a phase change element, and a top electrode. The dielectric layer overlies the bottom electrode. The heater extends upward from the bottom electrode, through the dielectric layer. Further, the heater has a top surface that is substantially planar and that is spaced below a top surface of the dielectric layer. The phase change element overlies the dielectric layer and protrudes into the dielectric layer to contact with the top surface of the heater. Also provided is a method for manufacturing the PCM cell.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: November 30, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi Jen Tsai, Shih-Chang Liu
  • Publication number: 20210118981
    Abstract: A semiconductor structure includes a substrate, a first electrode over the substrate, a second electrode over the first electrode, and a first insulating layer between the first electrode and the second electrode. The first insulating layer has a first portion and a second portion coupled to the first portion, the second portion of the first insulating layer is in contact with the second electrode, the first portion is separated from the second electrode by the second portion. A thickness of the second portion is greater than a thickness of the first portion.
    Type: Application
    Filed: October 16, 2019
    Publication date: April 22, 2021
    Inventors: YI JEN TSAI, YUAN-TAI TSENG, CHERN-YOW HSU
  • Patent number: 10943783
    Abstract: In a method of manufacturing a semiconductor device, a first layer having an opening is formed over a substrate. A second layer is formed over the first layer and the substrate. A photo resist pattern is formed over the second layer above the opening of the first layer. The photo resist pattern is reflowed by a thermal process. An etch-back operation is performed to planarize the second layer.
    Type: Grant
    Filed: May 30, 2019
    Date of Patent: March 9, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Cheng-Che Chung, Yi Jen Tsai, Ching-Sen Kuo, Tsai-Ming Huang, Jieh-Jang Chen, Feng-Jia Shiu
  • Patent number: 10879463
    Abstract: A phase change memory (PCM) cell with enhanced thermal isolation and low power consumption is provided. In some embodiments, the PCM cell comprises a bottom electrode, a dielectric layer, a heating element, and a phase change element. The dielectric layer is on the bottom electrode. The heating element extends through the dielectric layer, from a top of the dielectric layer to the bottom electrode. Further, the heating element has a pair of opposite sidewalls laterally spaced from the dielectric layer by a cavity. The phase change element overlies and contacts the heating element. An interface between the phase change element and the heating element extends continuously respectively from and to the opposite sidewalls of the heating element. Also provided is a method for manufacturing the PCM cell.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: December 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi Jen Tsai, Shih-Chang Liu
  • Publication number: 20200373484
    Abstract: A phase change memory (PCM) cell with a low deviation contact area between a heater and a phase change element is provided. The PCM cell comprises a bottom electrode, a dielectric layer, a heater, a phase change element, and a top electrode. The dielectric layer overlies the bottom electrode. The heater extends upward from the bottom electrode, through the dielectric layer. Further, the heater has a top surface that is substantially planar and that is spaced below a top surface of the dielectric layer. The phase change element overlies the dielectric layer and protrudes into the dielectric layer to contact with the top surface of the heater. Also provided is a method for manufacturing the PCM cell.
    Type: Application
    Filed: August 11, 2020
    Publication date: November 26, 2020
    Inventors: Yi Jen Tsai, Shih-Chang Liu
  • Patent number: 10790444
    Abstract: A phase change memory (PCM) cell with a low deviation contact area between a heater and a phase change element is provided. The PCM cell comprises a bottom electrode, a dielectric layer, a heater, a phase change element, and a top electrode. The dielectric layer overlies the bottom electrode. The heater extends upward from the bottom electrode, through the dielectric layer. Further, the heater has a top surface that is substantially planar and that is spaced below a top surface of the dielectric layer. The phase change element overlies the dielectric layer and protrudes into the dielectric layer to contact with the top surface of the heater. Also provided is a method for manufacturing the PCM cell.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: September 29, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi Jen Tsai, Shih-Chang Liu
  • Patent number: 10636670
    Abstract: A method of planarizing a semiconductor device includes forming a first region and a second region on a semiconductor substrate. The first region has a larger thickness than a thickness of the second region. An interlayer dielectric layer is conformally deposited on the first region and the second region. A photoresist is formed on the second region. A bottom anti-reflective coating layer is formed on the photoresist, first region and second region. A planarization process is performed to the semiconductor substrate. The planarization process to the first region and the second region includes removing portions of the interlayer dielectric layer, the photoresist and the BARC layer.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: April 28, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yi-Jen Tsai, Yuan-Tai Tseng, Shih-Chang Liu
  • Publication number: 20200075318
    Abstract: In a method of manufacturing a semiconductor device, a first layer having an opening is formed over a substrate. A second layer is formed over the first layer and the substrate. A photo resist pattern is formed over the second layer above the opening of the first layer. The photo resist pattern is reflowed by a thermal process. An etch-back operation is performed to planarize the second layer.
    Type: Application
    Filed: May 30, 2019
    Publication date: March 5, 2020
    Inventors: Cheng-Che CHUNG, Yi Jen TSAI, Ching-Sen KUO, Tsai-Ming HUANG, Jieh-Jang CHEN, Feng-Jia SHIU
  • Publication number: 20200035919
    Abstract: A phase change memory (PCM) cell with enhanced thermal isolation and low power consumption is provided. In some embodiments, the PCM cell comprises a bottom electrode, a dielectric layer, a heating element, and a phase change element. The dielectric layer is on the bottom electrode. The heating element extends through the dielectric layer, from a top of the dielectric layer to the bottom electrode. Further, the heating element has a pair of opposite sidewalls laterally spaced from the dielectric layer by a cavity. The phase change element overlies and contacts the heating element. An interface between the phase change element and the heating element extends continuously respectively from and to the opposite sidewalls of the heating element. Also provided is a method for manufacturing the PCM cell.
    Type: Application
    Filed: October 2, 2019
    Publication date: January 30, 2020
    Inventors: Yi Jen Tsai, Shih-Chang Liu
  • Publication number: 20200028075
    Abstract: A phase change memory (PCM) cell with a low deviation contact area between a heater and a phase change element is provided. The PCM cell comprises a bottom electrode, a dielectric layer, a heater, a phase change element, and a top electrode. The dielectric layer overlies the bottom electrode. The heater extends upward from the bottom electrode, through the dielectric layer. Further, the heater has a top surface that is substantially planar and that is spaced below a top surface of the dielectric layer. The phase change element overlies the dielectric layer and protrudes into the dielectric layer to contact with the top surface of the heater. Also provided is a method for manufacturing the PCM cell.
    Type: Application
    Filed: September 30, 2019
    Publication date: January 23, 2020
    Inventors: Yi Jen Tsai, Shih-Chang Liu
  • Patent number: 10505110
    Abstract: A phase change memory (PCM) cell with enhanced thermal isolation and low power consumption is provided. In some embodiments, the PCM cell comprises a bottom electrode, a dielectric layer, a heating element, and a phase change element. The dielectric layer is on the bottom electrode. The heating element extends through the dielectric layer, from a top of the dielectric layer to the bottom electrode. Further, the heating element has a pair of opposite sidewalls laterally spaced from the dielectric layer by a cavity. The phase change element overlies and contacts the heating element. An interface between the phase change element and the heating element extends continuously respectively from and to the opposite sidewalls of the heating element. Also provided is a method for manufacturing the PCM cell.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: December 10, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi Jen Tsai, Shih-Chang Liu
  • Patent number: 10490742
    Abstract: A phase change memory (PCM) cell with a low deviation contact area between a heater and a phase change element is provided. The PCM cell comprises a bottom electrode, a dielectric layer, a heater, a phase change element, and a top electrode. The dielectric layer overlies the bottom electrode. The heater extends upward from the bottom electrode, through the dielectric layer. Further, the heater has a top surface that is substantially planar and that is spaced below a top surface of the dielectric layer. The phase change element overlies the dielectric layer and protrudes into the dielectric layer to contact with the top surface of the heater. Also provided is a method for manufacturing the PCM cell.
    Type: Grant
    Filed: June 13, 2018
    Date of Patent: November 26, 2019
    Assignee: Taiwan Seminconductor Manufacturing Co., Ltd.
    Inventors: Yi Jen Tsai, Shih-Chang Liu
  • Patent number: D1038332
    Type: Grant
    Filed: October 21, 2022
    Date of Patent: August 6, 2024
    Assignee: Globe Union Industrial Corp.
    Inventors: Yi-Shan Chiang, Ya-Chieh Lai, Chun-Yi Tu, Wei-Jen Chen, Tun-Yao Tsai
  • Patent number: D1049316
    Type: Grant
    Filed: October 21, 2022
    Date of Patent: October 29, 2024
    Assignee: Globe Union Industrial Corp.
    Inventors: Yi-Shan Chiang, Ya-Chieh Lai, Chun-Yi Tu, Wei-Jen Chen, Tun-Yao Tsai