Patents by Inventor Yi Kai

Yi Kai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11974076
    Abstract: A security system includes a surveillance device that monitors a predetermined event and captures images in a monitor scene; and a controller that controls the surveillance device and transmits the captured images. The surveillance device adjusts image capture amount, image transmit amount, image transmit order or image resolution when the predetermined event is detected and an object is detected on the captured images.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: April 30, 2024
    Assignee: Climax Technology Co., Ltd.
    Inventor: Yi-Kai Chen
  • Publication number: 20240131329
    Abstract: Systems and methods for implementation of a disposable miniaturized implant for treatment of Post-Operative Ileums (POI), a miniaturized implant for treating chronic GI dysmotility (e.g., dysphagia, gastroesophageal reflux disease (GERD), nausea, functional dyspepsia, blockage of transit, and gastroparesis, inflammatory bowel disease) and obesity, by providing electrical stimulation to the part of bowel going through surgery to expedite the healing process while recording the smooth muscle activities simultaneously, or providing stimulation on a treatment location of the GI tract or the branch of the vagus nerve. Systems and methods are also provided for non-invasive, transcutaneous stimulation of anatomy within the abdomen of the patient.
    Type: Application
    Filed: October 31, 2023
    Publication date: April 25, 2024
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Yi-Kai Lo, Wentai Liu
  • Patent number: 11964881
    Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.
    Type: Grant
    Filed: July 27, 2020
    Date of Patent: April 23, 2024
    Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITY
    Inventors: Pu-Wei Wu, Yi-Chieh Hsieh, Han-Yi Wang, Kuang-Chih Tso, Tzu-Ying Chan, Chung-Kai Chang, Chi-Shih Chen, Yu-Ting Cheng
  • Publication number: 20240130140
    Abstract: A semiconductor device includes a substrate having a magnetic tunneling junction (MTJ) region and a logic region, a magnetic tunneling junction (MTJ) on the MTJ region and a first metal interconnection on the MTJ. Preferably, a top view of the MTJ includes a circle and a top view of the first metal interconnection includes an ellipse overlapping the circle.
    Type: Application
    Filed: December 26, 2023
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Ting-Hsiang Huang, Yi-Chung Sheng, Sheng-Yuan Hsueh, Kuo-Hsing Lee, Chih-Kai Kang
  • Publication number: 20240130246
    Abstract: A method for fabricating a semiconductor device includes the steps of first forming a first inter-metal dielectric (IMD) layer on a substrate and a metal interconnection in the first IMD layer, forming a magnetic tunneling junction (MTJ) and a top electrode on the metal interconnection, forming a spacer adjacent to the MTJ and the top electrode, forming a second IMD layer around the spacer, forming a cap layer on the top electrode, the spacer, and the second IMD layer, and then patterning the cap layer to form a protective cap on the top electrode and the spacer.
    Type: Application
    Filed: December 25, 2023
    Publication date: April 18, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Po-Kai Hsu, Ju-Chun Fan, Ching-Hua Hsu, Yi-Yu Lin, Hung-Yueh Chen
  • Publication number: 20240120812
    Abstract: An integrated motor and drive assembly is disclosed and includes a housing, a motor and a drive. The housing includes a motor-accommodation portion and a drive-accommodation portion. The drive includes a power board and a control board. The power board is made of a high thermal conductivity substrate and includes a power element and an encoder disposed on the first side, the first side faces the motor, the power board and the motor are stacked along a first direction, and the second side contacts the housing to from a heat-dissipating route. The control board is disposed adjacent to the power board. The control board and the power board are arranged along a second direction perpendicular to the first direction, and the first direction is parallel to an axial direction of the motor. A part of the power board and a part of the control board are directly contacted to form an electrical connection.
    Type: Application
    Filed: July 17, 2023
    Publication date: April 11, 2024
    Inventors: Chi-Hsiang Kuo, Yi-Yu Lee, Zuo-Ying Wei, Yuan-Kai Liao, Wen-Cheng Hsieh
  • Patent number: 11957061
    Abstract: A semiconductor device includes a substrate, a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer is disposed on the substrate, around a first metal interconnection. The second dielectric layer is disposed on the first dielectric layer, around a via and a second metal interconnection. The second metal interconnection directly contacts the first metal interconnection. The third dielectric layer is disposed on the second dielectric layer, around a first magnetic tunneling junction (MTJ) structure and a third metal interconnection. The third metal interconnection directly contacts top surfaces of the first MTJ structure and the second metal interconnection, and the first MTJ structure directly contacts the via.
    Type: Grant
    Filed: May 23, 2023
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Po-Kai Hsu, Ju-Chun Fan, Yi-Yu Lin, Ching-Hua Hsu, Hung-Yueh Chen
  • Publication number: 20240113187
    Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a substrate having one or more interior surfaces forming a recess within an upper surface of the substrate. Source/drain regions are disposed within the substrate on opposing sides of the recess. A first gate dielectric is arranged along the one or more interior surfaces forming the recess, and a second gate dielectric is arranged on the first gate dielectric and within the recess. A gate electrode is disposed on the second gate dielectric. The second gate dielectric includes one or more protrusions that extend outward from a recessed upper surface of the second gate dielectric and that are arranged along opposing sides of the second gate dielectric.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 4, 2024
    Inventors: Jhu-Min Song, Ying-Chou Chen, Yi-Kai Ciou, Chien-Chih Chou, Fei-Yun Chen, Yu-Chang Jong, Chi-Te Lin
  • Patent number: 11944814
    Abstract: A wireless implant and associated system for motor function recovery after spinal cord injury, and more particularly a multi-channel wireless implant with small package size. The wireless implant can further be used in various medical applications, such as retinal prostheses, gastrointestinal implant, vagus nerve stimulation, and cortical neuromodulation. The system also includes a method and its implementation to acquire the impedance model of the electrode-tissue interface of the implant.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: April 2, 2024
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Yi-Kai Lo, Wentai Liu, Victor R. Edgerton, Chih-Wei Chang
  • Patent number: 11940486
    Abstract: A probe station includes a frame, a platform, a testing equipment, a probe holder and at least one probe. The frame defines an accommodation space. The platform is connected with the frame. The platform has an opening. The opening is communicated with the accommodation space. The testing equipment is at least partially disposed in the accommodation space and is at least partially exposed through the opening. The probe holder is disposed on the platform. The probe is held by the probe holder. The probe holder is configured to control the probe to contact with a device under test disposed on the testing equipment through the opening.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: March 26, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Yi-Kai Chao
  • Publication number: 20240096998
    Abstract: The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.
    Type: Application
    Filed: November 21, 2023
    Publication date: March 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shuen-Shin LIANG, Chij-chien CHI, Yi-Ying LIU, Chia-Hung CHU, Hsu-Kai CHANG, Cheng-Wei CHANG, Chein-Shun LIAO, Keng-chu LIN, KAi-Ting HUANG
  • Publication number: 20240098754
    Abstract: Various solutions for providing a unified control channel framework in mobile communications are described. An apparatus receives a first-stage downlink control information (DCI) from a network node. The first-stage DCI indicates first scheduling information associated with a second-stage DCI. Then, the apparatus receives the second-stage DCI from the network node according to the first scheduling information. The second-stage DCI indicates second scheduling information associated with one or more carriers or cells or indicates non-scheduling information associated with one or more features. Also, the apparatus performs operations including either one of the following: (1) performing a PDSCH reception or a PUSCH transmission on at least one of the one or more carriers or cells according to the second scheduling information; and (2) applying the non-scheduling information in an event that the apparatus supports at least one of the one or more features.
    Type: Application
    Filed: August 15, 2023
    Publication date: March 21, 2024
    Inventors: Yi-Ju Liao, Pei-Kai Liao, Chi-Hsuan Hsieh
  • Publication number: 20240097019
    Abstract: A semiconductor device includes a substrate, an epitaxial layer, a well region, a source region, a base region, a first JFET region, a second JFET region, a gate dielectric layer and a gate layer. The epitaxial layer is at a side of the substrate. The well region is in the epitaxial layer. The source region is in the well region. The base region is in the well region and adjacent to the source region. The first JFET region is adjacent to the well region. The second JFET region is in the first JFET region. A doping concentration of the second JFET region is higher than a doping concentration of the first JFET region. The gate dielectric layer is at a side of the epitaxial layer away from the substrate. The gate layer is at a side of the gate dielectric layer away from the epitaxial layer.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 21, 2024
    Inventors: Yi-Kai HSIAO, Kuang-Hao CHIANG, Hao-Chung KUO
  • Publication number: 20240081654
    Abstract: Systems and methods that can employ a bleeding sensor that uses an optical mechanism to detect blood in the patients GI tract are described. The bleeding sensor includes a substrate holding a centrally-located light detector with a broad sensitivity spectrum and at least two light emitters positioned radially around the centrally-located light detector, each light emitter configured to emit light of different primary wavelengths. The bleeding sensor has a gap between each of the at least two light emitters and the centrally-located light detector that accepts the contents of a patients gastrointestinal tract. An optical cap covers the centrally-located light detector and the at least two light emitters to direct the light emitted from the at least two light emitters through the gap and onto the centrally-located light detector.
    Type: Application
    Filed: April 6, 2022
    Publication date: March 14, 2024
    Inventors: Alexander Barnes BALDWIN, Yi-Kai LO
  • Publication number: 20240089198
    Abstract: A packet processing method and system, and a network device are disclosed, and belong to the field of network technologies. A first network device sends a first packet to a second network device through a first tunnel, and sends a second packet to a third network device through a second tunnel. The second network device forwards the first packet to the third network device through a third tunnel. The third network device processes the first packet and the second packet. The first network device is located at a first site. The second network device and the third network device are located at a second site. The first site and the second site are connected through a wide area network. Wide area network multipath transmission may be implemented in a multi-gateway scenario.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Inventors: Boyuan YU, Qi YU, Penghe TANG, Yi KAI, Huanhuan ZHANG, Nu XIA
  • FAN
    Publication number: 20240084813
    Abstract: A fan includes a fan hub and multiple blades. At least one blade includes a blade body and two extended blade portions. The two extended blade portions are connected to a first edge and a second edge on the blade body. The first edge and the second edge are opposite to sides of the blade body. In a top view, at least one of the two extended blade portions has a first width that is adjacent to the fan hub, and a second width that is away from the fan hub. The second width is larger than the first width. The second width and the first width are connected by a continuous surface. The width of the continuous surface increases away from the first width.
    Type: Application
    Filed: December 19, 2022
    Publication date: March 14, 2024
    Inventors: Yi-Lun CHENG, Chih Kai YANG
  • Publication number: 20240075895
    Abstract: Embodiments are disclosed for crash detection on one or more mobile devices (e.g., smartwatch and/or smartphone). In some embodiments, a method comprises: detecting, with at least one processor, a crash event on a crash device; extracting, with the at least one processor, multimodal features from sensor data generated by multiple sensing modalities of the crash device; computing, with the at least one processor, a plurality of crash decisions based on a plurality of machine learning models applied to the multimodal features; and determining, with the at least one processor, that a severe vehicle crash has occurred involving the crash device based on the plurality of crash decisions and a severity model.
    Type: Application
    Filed: September 6, 2023
    Publication date: March 7, 2024
    Inventors: Vinay R. Majjigi, Sriram Venkateswaran, Aniket Aranake, Tejal Bhamre, Alexandru Popovici, Parisa Dehleh Hossein Zadeh, Yann Jerome Julien Renard, Yi Wen Liao, Stephen P. Jackson, Rebecca L. Clarkson, Henry Choi, Paul D. Bryan, Mrinal Agarwal, Ethan Goolish, Richard G. Liu, Omar Aziz, Alvaro J. Melendez Hasbun, David Ojeda Avellaneda, Sunny Kai Pang Chow, Pedro O. Varangot, Tianye Sun, Karthik Jayaraman Raghuram, Hung A. Pham
  • Patent number: 11925035
    Abstract: A hybrid random access memory for a system-on-chip (SOC), including a semiconductor substrate with a MRAM region and a ReRAM region, a first dielectric layer on the semiconductor substrate, multiple ReRAM cells in the first dielectric layer on the ReRAM region, a second dielectric layer above the first dielectric layer, and multiple MRAM cells in the second dielectric layer on the MRAM region.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: March 5, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Kai Hsu, Hui-Lin Wang, Ching-Hua Hsu, Yi-Yu Lin, Ju-Chun Fan, Hung-Yueh Chen
  • Patent number: 11923794
    Abstract: A motor control apparatus receives a DC power source through a DC terminal and is coupled to a motor. The motor control apparatus includes a brake, an inverter, and a controller. The brake is coupled to the inverter. The brake includes an energy-consuming component and a switch component. The controller controls the inverter to convert the DC power source to drive the motor. When the controller determines that the DC power source is interrupted, the controller stops controlling the inverter, and the switch component is self-driven turned on so that a back electromotive force generated by the motor is consumed through the energy-consuming component.
    Type: Grant
    Filed: June 7, 2023
    Date of Patent: March 5, 2024
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Te-Wei Wang, Yi-Kai Peng, Chen-Yeh Lee
  • Publication number: 20240072203
    Abstract: A method for fabricating light emitting diode (LED) dice includes the steps of: providing a substrate, and forming a plurality of die sized semiconductor structures on the substrate. The method also includes the steps of providing a receiving plate having an elastomeric polymer layer, placing the substrate and the receiving plate in physical contact with an adhesive force applied by the elastomeric polymer layer, and performing a laser lift-off (LLO) process by directing a uniform laser beam through the substrate to the semiconductor layer at an interface with the substrate to lift off the semiconductor structures onto the elastomeric polymer layer. During the laser lift-off (LLO) process the elastomeric polymer layer functions as a shock absorber to reduce momentum transfer, and as an adhesive surface to hold the semiconductor structures in place on the receiving plate.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicants: SemiLEDs Corporation, SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Chen-Fu Chu, Shih-Kai Chan, Yi-Feng Shih, David Trung Doan, Trung Tri Doan, Yoshinori Ogawa, Kohei Otake, Kazunori Kondo, Keiji Ohori, Taichi Kitagawa, Nobuaki Matsumoto, Toshiyuki Ozai, Shuhei Ueda