Abstract: The present disclosure relates to an integrated chip. The integrated chip includes a first capacitor conductor disposed over an isolation structure arranged within a substrate. The isolation structure laterally extends past opposing outer sidewalls of the first capacitor conductor. A capacitor dielectric is arranged along one of the opposing outer sidewalls of the first capacitor conductor and over a top surface of the first capacitor conductor. A second capacitor conductor is arranged along an outer sidewall of the capacitor dielectric and over a top surface of the capacitor dielectric. The second capacitor conductor laterally overlaps parts of both the capacitor dielectric and the first capacitor conductor.

Abstract: A semiconductor device includes a substrate having a magnetic tunneling junction (MTJ) region and a logic region, a magnetic tunneling junction (MTJ) on the MTJ region and a first metal interconnection on the MTJ. Preferably, a top view of the MTJ includes a circle and a top view of the first metal interconnection includes an ellipse overlapping the circle.

Abstract: Systems and methods for implementation of a disposable miniaturized implant for treatment of Post-Operative Ileums (POI), a miniaturized implant for treating chronic GI dysmotility (e.g., dysphagia, gastroesophageal reflux disease (GERD), nausea, functional dyspepsia, blockage of transit, and gastroparesis, inflammatory bowel disease) and obesity, by providing electrical stimulation to the part of bowel going through surgery to expedite the healing process while recording the smooth muscle activities simultaneously, or providing stimulation on a treatment location of the GI tract or the branch of the vagus nerve. Systems and methods are also provided for non-invasive, transcutaneous stimulation of anatomy within the abdomen of the patient.

Abstract: Various embodiments of the present disclosure are directed towards a semiconductor structure including a first substrate comprising a first semiconductor material. A first light sensor is disposed within the first substrate. The first light sensor is configured to absorb electromagnetic radiation within a first wavelength range. A second light sensor is disposed within an absorption structure underlying the first substrate. The second light sensor is configured to absorb electromagnetic radiation within a second wavelength range different from the first wavelength range. The absorption structure underlies the first light sensor and comprises a second semiconductor material different from the first semiconductor material.

Abstract: A method for fabricating a semiconductor device includes the steps of first forming a first inter-metal dielectric (IMD) layer on a substrate and a metal interconnection in the first IMD layer, forming a magnetic tunneling junction (MTJ) and a top electrode on the metal interconnection, forming a spacer adjacent to the MTJ and the top electrode, forming a second IMD layer around the spacer, forming a cap layer on the top electrode, the spacer, and the second IMD layer, and then patterning the cap layer to form a protective cap on the top electrode and the spacer.

Abstract: A gate oxide layer for a high voltage transistor is formed using methods that avoid thinning in the corners of the gate oxide layer. A recess is formed in a silicon substrate. The exposed surfaces of the recess are thermally oxidized to form a thermal oxide layer of the gate oxide layer. A high temperature oxide layer of the gate oxide layer is then formed within the exposed surfaces of the recess by chemical vapor deposition. The combination of the thermal oxide layer and the high temperature oxide layer results in a gate oxide layer that does not exhibit the double hump phenomenon in the drain current vs. gate voltage curve. The high temperature oxide layer may include a rim that extends out of the recess.

Abstract: An electronic package and a manufacturing method thereof are provided, in which an electronic element stacking structure is disposed on a carrier structure to integrate multiple chips into a single package, so that the electronic package can meet with the requirements of miniaturization without increasing the layout area of the carrier structure.

Abstract: A transcutaneous electrical stimulation system is provided that can include a number of features. In one implementation, the system can include a plurality of electrodes configured to be in contact with a skin surface of a patient. The system can further include a flexible hub electrically connected to the electrodes and configured to be in contact with the patient. A bend sensor can be disposed in the hub and configured to measure a curvature of the hub. The system can include a signal processing device electrically coupled to the plurality of electrodes and the bend sensor, the signal processing device being configured to change stimulation settings of the plurality of electrodes based on the curvature of the hub. In some implementations, the system can include a multi-channel stimulator. Methods of use are also provided.

Abstract: In a method of manufacturing a semiconductor device, a mask pattern is formed over a target layer to be etched, and the target layer is etched by using the mask pattern as an etching mask. The etching is performed by using an electron cyclotron resonance (ECR) plasma etching apparatus, the ECR plasma etching apparatus includes one or more coils, and a plasma condition of the ECR plasma etching is changed during the etching the target layer by changing an input current to the one or more coils.

Abstract: Some embodiments relate to an integrated circuit device incorporating an etched recessed gate dielectric region. The integrated circuit device includes a substrate including a first upper surface, a gate dielectric region disposed at the first upper surface of the substrate and extending into the substrate, and a gate structure disposed over the gate dielectric region. The gate dielectric region includes a second upper surface and forms a recess extending below the second upper surface. The second upper surface includes a perimeter portion surrounding the recess. The gate structure completely covers the second upper surface of the gate dielectric region and extends into the recess.

Abstract: A memory device is provided, including a memory array, a driver circuit, and recover circuit. The memory array includes multiple memory cells. Each memory cell is coupled to a control line, a data line, and a source line and, during a normal operation, is configured to receive first and second voltage signals. The driver circuit is configured to output at least one of the first voltage signal or the second voltage signal to the memory cells. The recover circuit is configured to output, during a recover operation, a third voltage signal, through the driver circuit to at least one of the memory cells. The third voltage signal is configured to have a first voltage level that is higher than a highest level of the first voltage signal or the second voltage signal, or lower than a lowest level of the first voltage signal or the second voltage signal.

Abstract: A contiguous memory allocation device includes a memory and a processor. The memory is configured to store at least one command. The processor is configured to read the at least one command to execute following steps: calculating a page thrashing value of the memory; determining a corresponding relation between the page thrashing value and a predetermined thrashing value; and deciding whether to lend a contiguous memory according to the corresponding relation.

Abstract: A titanium precursor is used to selectively form a titanium silicide (TiSix) layer in a semiconductor device. A plasma-based deposition operation is performed in which the titanium precursor is provided into an opening, and a reactant gas and a plasma are used to cause silicon to diffuse to a top surface of a transistor structure. The diffusion of silicon results in the formation of a silicon-rich surface of the transistor structure, which increases the selectivity of the titanium silicide formation relative to other materials of the semiconductor device. The titanium precursor reacts with the silicon-rich surface to form the titanium silicide layer. The selective titanium silicide layer formation results in the formation of a titanium silicon nitride (TiSixNy) on the sidewalls in the opening, which enables a conductive structure such as a metal source/drain contact to be formed in the opening without the addition of another barrier layer.

Abstract: An automated molecular operating system includes at least one centrifuge tube carrying module, a transport module, a plurality of temperature control modules, a capping module, a magnetic field module and an automated processing module. The automated processing module is electrically connected to the transport module, the temperature control modules, the capping module and the magnetic field module, and controls the transport module to move the centrifuge tube carrying module, so that a centrifuge tube contained in the centrifuge tube carrying module makes a reaction in the temperature control modules, and the magnetic field module or the capping module is provided to the centrifuge tube according to requirements, such that a specimen in the centrifuge tube can be automatically subjected to nucleic acid extraction, nucleic acid amplification, primer labeling, reverse transcription or a combination thereof, thereby reducing manual operation errors and increasing the ease of operation.

Abstract: Methods, apparatus, and systems are disclosed for optimization techniques and a realistic 3D model to design optimal parameters for transcutaneous stimulation to achieve focalized stimulation of a target tissue such as the spinal cord, brain or other internal organ. The methods, apparatus, and systems include generation of a 3D model from a CT/MRI image, as well as an optimization algorithm that enables stimulation of any target location (e.g., on the dorsal root, or on the dorsal column) with any orientation at high precision.

Abstract: A probe station includes a frame, a platform, a testing equipment, a probe holder and at least one probe. The frame defines an accommodation space. The platform is connected with the frame. The platform has an opening. The opening is communicated with the accommodation space. The testing equipment is at least partially disposed in the accommodation space and is at least partially exposed through the opening. The probe holder is disposed on the platform. The probe is held by the probe holder. The probe holder is configured to control the probe to contact with a device under test disposed on the testing equipment through the opening.

Abstract: A semiconductor structure includes a substrate, an isolation structure disposed in the substrate, and a hybrid structure disposed over the isolation structure. The hybrid structure is substantially conformal with respect to a profile of the isolation structure. The hybrid structure includes an oxide component, a nitride component surrounding the oxide component, and a first polysilicon component alongside the nitride component. The nitride component includes a first upper surface closed to the first polysilicon component, and a second upper surface distal to the first polysilicon component. The second upper surface is lower than the first upper surface.

Abstract: The present invention relates to a control device and method for adjusting speed and forward/reverse rotation of a wire-controlled brushless motor power supply during positive/negative half-cycle phase loss, comprising an AC power supply, a wire-controlled circuit control device, a brushless motor control device, and a ceiling fan brushless motor, wherein the AC power supply is electrically connected to the wire-controlled circuit control device which is electrically connected to the brushless motor control device and which is electrically connected to the ceiling fan brushless motor, to control the AC power supply positive/negative half-cycle on/off and to generate a positive/negative half-cycle signal for multi-step speed and forward/reverse rotation control, detection, determination, and storage. The overall design is simple and convenient without the need for complicated and cumbersome wiring or safety concerns, to achieve the effect of structural stability and the use of safety and convenience.