Patents by Inventor Yi Ku

Yi Ku has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12209013
    Abstract: A method includes bonding a supporting substrate to a semiconductor substrate of a wafer. A bonding layer is between, and is bonded to both of, the supporting substrate and the semiconductor substrate. A first etching process is performed to etch the supporting substrate and to form an opening, which penetrates through the supporting substrate and stops on the bonding layer. The opening has substantially straight edges. The bonding layer is then etched. A second etching process is performed to extend the opening down into the semiconductor substrate. A bottom portion of the opening is curved.
    Type: Grant
    Filed: August 6, 2023
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Jhao-Yi Wang, Chin-Yu Ku, Wen-Hsiung Lu, Lung-Kai Mao, Ming-Da Cheng
  • Patent number: 12206011
    Abstract: A method includes forming a dummy gate stack, etching the dummy gate stack to form an opening, depositing a first dielectric layer extending into the opening, and depositing a second dielectric layer on the first dielectric layer and extending into the opening. A planarization process is then performed to form a gate isolation region including the first dielectric layer and the second dielectric layer. The dummy gate stack is then removed to form trenches on opposing sides of the gate isolation region. The method further includes performing a first etching process to remove sidewall portions of the first dielectric layer, performing a second etching process to thin the second dielectric layer, and forming replacement gates in the trenches.
    Type: Grant
    Filed: July 19, 2023
    Date of Patent: January 21, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shih-Yao Lin, Chih-Han Lin, Shu-Uei Jang, Ya-Yi Tsai, Shu-Yuan Ku
  • Publication number: 20250022715
    Abstract: Methods for fabricating semiconductor devices are provided. An exemplary method includes forming fins in a dense region and in an isolated region of a semiconductor substrate; performing a plasma dry etch process to remove a portion of at least one selected fin to form a first trench in the dense region and to remove a portion of at least one selected fin in the isolated region to form a second trench in the isolated region, wherein the plasma dry etch process includes: performing a passivation-oriented process and an etchant-oriented process; and controlling the passivation-oriented process and the etchant-oriented process to form the first trench with a desired first critical dimension and first depth and to form the second trench with a desired second critical dimension and second depth.
    Type: Application
    Filed: July 10, 2023
    Publication date: January 16, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Ging Lin, Ya-Yi Tsai, Chun-Liang Lai, Yun-Chen WU, Shu-Yuan Ku
  • Publication number: 20240175938
    Abstract: An electric-electric-leakage detection device includes an electric-leakage detection module, a switch module and an indicator. The electric-leakage detection module is configured for converting an AC electric-leakage voltage into a DC electric-leakage voltage. The switch module is electrically connected to the electric-leakage detection module and configured for being turned on or turned off according to the DC electric-leakage voltage. The indicator is electrically connected to the switch module and configured for outputting an indication signal according to conduction of the switch module.
    Type: Application
    Filed: February 16, 2023
    Publication date: May 30, 2024
    Inventor: Po-Yi KU
  • Patent number: 11825943
    Abstract: A telescopic slide rail support pulley structure includes a first rail provided with multiple mounting holes and a first rolling carriage, a second rail include notch, a positioning hole and a second rolling carriage, a support pulley assembly provided with an upper roller, a lower roller, a support holder and a connecting portion, and a third rail. The connecting portion of the support pulley assembly is mounted to the notch of the second rail. The support pulley assembly also has an upper roller groove and a lower roller groove. The upper roller is arranged in the upper roller groove. The lower roller is arranged in the lower roller groove. The third rail is connected to the second rail through the second rolling carriage. The second rail is connected to the first rail through the first rolling carriage.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: November 28, 2023
    Assignee: Nan Juen International Co., Ltd.
    Inventors: Xin-Hong Wei, Wei-Liang Liao, Ke-Yi Ku
  • Publication number: 20230024491
    Abstract: A method is provided forming an airtight structure of an electroacoustic device which includes a body shell composed of at least two half-shells and at least one airtight structure region. The method includes providing an automatic glue dispensing device for dispensing and pre-curing a photo-curing glue for one of the two half-shells, putting the half-shell into a photo-curing device to convert the photo-curing glue pre-cured completely into an elastomer, and combining the half-shell and the other one to have a pressing wall of the other half-shell to press the elastomer to form the airtight structure of the electroacoustic device, wherein the automatic glue dispensing device includes a glue dispensing head moving on a groove of the airtight region of the half-shell for dispensing the photo-curing glue and a pre-curing head continuously providing a curing light ray for pre-curing the photo-curing glue.
    Type: Application
    Filed: July 23, 2021
    Publication date: January 26, 2023
    Inventors: Tan-Chih WU, Chia-Yen LI, Hung-Wei CHEN, Yi-Ku HUANG, Chene-Lun LEE, Ting-Yu WANG, Hsuan-Yi LIAO, Sheng-Wei CHEN, Jen-Hsin CHAN
  • Publication number: 20220295987
    Abstract: A telescopic slide rail support pulley structure includes a first rail provided with multiple mounting holes and a first rolling carriage, a second rail include notch, a positioning hole and a second rolling carriage, a support pulley assembly provided with an upper roller, a lower roller, a support holder and a connecting portion, and a third rail. The connecting portion of the support pulley assembly is mounted to the notch of the second rail. The support pulley assembly also has an upper roller groove and a lower roller groove. The upper roller is arranged in the upper roller groove. The lower roller is arranged in the lower roller groove. The third rail is connected to the second rail through the second rolling carriage. The second rail is connected to the first rail through the first rolling carriage.
    Type: Application
    Filed: September 16, 2021
    Publication date: September 22, 2022
    Inventors: Xin-Hong WEI, Wei-Liang LIAO, Ke-Yi KU
  • Patent number: 11095120
    Abstract: A surge protection device includes a surge protection circuit, a controller, and a wireless module. The surge protection circuit has a plurality of surge protection elements, receives a power source and correspondingly generates a sampling signal according to the power source. The controller compares a representative voltage value of the power source corresponding to the sampling signal with a first reference value to determine a using state of the surge protection circuit. The wireless module correspondingly transmits the using state to a remote server.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: August 17, 2021
    Assignees: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, Lite-On Technology Corporation
    Inventors: Po-Yi Ku, Chien-Lung Wang
  • Patent number: 10923903
    Abstract: The invention provides a low phase surge protection device including a voltage converter, a low phase delay detector and an output control switch. The voltage converter receives an alternate current (AC) input voltage, and converts the AC input voltage into a direct current (DC) input voltage. The low phase delay detector receives the DC input voltage to be a power source, enables a phase detection scheme by detecting whether the AC input voltage is in a stable state, and generates an enable signal by detecting a phase of the AC input voltage after the phase detection scheme is enabled. The output control switch receives the AC input voltage, and determines whether to transmit the AC input voltage to be an output voltage according to the enable signal.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: February 16, 2021
    Assignee: Lite-On Technology Corporation
    Inventors: Po-Yi Ku, Chien-Lung Wang, Chung-Hsin Chen
  • Publication number: 20200235572
    Abstract: A surge protection device includes a surge protection circuit, a controller, and a wireless module. The surge protection circuit has a plurality of surge protection elements, receives a power source and correspondingly generates a sampling signal according to the power source. The controller compares a representative voltage value of the power source corresponding to the sampling signal with a first reference value to determine a using state of the surge protection circuit. The wireless module correspondingly transmits the using state to a remote server.
    Type: Application
    Filed: June 18, 2019
    Publication date: July 23, 2020
    Applicants: LITE-ON ELECTRONICS (GUANGZHOU) LIMITED, Lite-On Technology Corporation
    Inventors: Po-Yi Ku, Chien-Lung Wang
  • Publication number: 20190027921
    Abstract: The invention provides a low phase surge protection device including a voltage converter, a low phase delay detector and an output control switch. The voltage converter receives an alternate current (AC) input voltage, and converts the AC input voltage into a direct current (DC) input voltage. The low phase delay detector receives the DC input voltage to be a power source, enables a phase detection scheme by detecting whether the AC input voltage is in a stable state, and generates an enable signal by detecting a phase of the AC input voltage after the phase detection scheme is enabled. The output control switch receives the AC input voltage, and determines whether to transmit the AC input voltage to be an output voltage according to the enable signal.
    Type: Application
    Filed: December 20, 2017
    Publication date: January 24, 2019
    Applicant: Lite-On Technology Corporation
    Inventors: Po-Yi Ku, Chien-Lung Wang, Chung-Hsin Chen
  • Publication number: 20100138564
    Abstract: A virtual USB port numbers assigning method, applicable to a client device for generating a virtual port representing an actual port of a remote USB hub. The steps comprise: detecting an electrical device connecting to the actual port; requesting data regarding the actual port and the connected electronic device, such as the MAC address and actual port number of the remote USB hub, and the PID and VID of the electrical device; evaluating the data; and assigning virtual ports according to the evaluation result. By assigning fixed virtual port number to each electrical device, so as to prevent the operating system from repeatedly asking users to install the driver program of the electrical device.
    Type: Application
    Filed: April 24, 2009
    Publication date: June 3, 2010
    Inventors: CHING-HSIANG LEE, TSU-YI KU
  • Publication number: 20080232370
    Abstract: A method of communication in LAN without setting IP is provided, especially for LAN with a host device and at least a peripheral device. The method includes: (1) the host device sending the peripheral device a broadcast search packet through LAN, (2) the peripheral device establishing a new routing table according to the packet, (3) the peripheral device returning a response packet containing IP data to the host device, (4) the host device establishing a new routing table according to the response packets returned from peripheral device, and (5) the host device performing wired or wireless LAN communication with peripheral device according to the new routing table. Therefore, the host device and the device can automatically detect IP data even they may belong to different sub-net to achieve the communication in LAN without setting IP.
    Type: Application
    Filed: March 20, 2007
    Publication date: September 25, 2008
    Inventors: Ching Hsiang Lee, Tsu Yi Ku
  • Patent number: 7353479
    Abstract: A method for placing probing pad and a computer readable recording medium for storing a program thereof are provided. The method is suitable for placing the probing pads in an integrated circuit (IC). Wherein, appropriate grid spacing is determined and a plurality of grids with fixed grid spacing is generated. The location of each preformed grid on the net connecting to the interesting pin is defined as first candidate probing points. Then, based on the metal layer where the first candidate probing points are located and the corresponding locations between the first candidate probing points and the interesting pin, one candidate probing point among all of the first candidate probing points on each net where the probing pad can be placed on is selected as the probing point. Finally, a probing pad is placed on each of the selected probing points.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: April 1, 2008
    Assignee: Faraday Technology Corp.
    Inventors: Chien-Yi Ku, Szu-Sheng Kang
  • Publication number: 20070014015
    Abstract: A method for correlating a structural parameter of a plurality of gratings acquires images from a plurality of gratings, which have different structural parameters. A focus metrics algorithm is then performed to find the off-focus offset of the orders of each grating from the intensity variation of these images, and the variation ratio of the off-focus offset to the order for each grating is calculated later. Consequently, the structural parameters of these gratings can be correlated based on the variation ratio of the off-focus offset to the order. The present method acquires images from an unknown grating at different off-focus offsets, and performs a focus metrics algorithm to find the off-focus offset of the orders of the unknown grating. The variation ratio is calculated and the structural parameter of the unknown grating is determined based on the variation ratio.
    Type: Application
    Filed: June 19, 2006
    Publication date: January 18, 2007
    Inventors: An Liu, Yi Ku
  • Publication number: 20060190891
    Abstract: A method for placing probing pad and a computer readable recording medium for storing a program thereof are provided. The method is suitable for placing the probing pads in an integrated circuit (IC). Wherein, appropriate grid spacing is determined and a plurality of grids with fixed grid spacing is generated. The location of each preformed grid on the net connecting to the interesting pin is defined as first candidate probing points. Then, based on the metal layer where the first candidate probing points are located and the corresponding locations between the first candidate probing points and the interesting pin, one candidate probing point among all of the first candidate probing points on each net where the probing pad can be placed on is selected as the probing point. Finally, a probing pad is placed on each of the selected probing points.
    Type: Application
    Filed: January 31, 2005
    Publication date: August 24, 2006
    Inventors: Chien-Yi Ku, Szu-Sheng Kang
  • Patent number: 7096441
    Abstract: A method is capable of generating a command file of a group of design rule check (DRC) rules or layout versus schematic (LVS) rules and layout parasitic extraction (LPE) rules that can be used by a layout verification tool to verify the layout and the parasitic characteristics of an integrated circuit. The method comprises choosing whether to generate a command file of DRC rules or a command file of LVS/LPE rules, selecting a process from a group of processes, setting a set of parameters, and extracting program codes from a plurality of modules according to the selected process and the set of parameters so as to generate a command file of DRC rules or LVS/LPE rules.
    Type: Grant
    Filed: May 11, 2004
    Date of Patent: August 22, 2006
    Assignee: Faraday Technology Corp.
    Inventors: Chun-Wei Lo, Szu-Sheng Kang, Chien-Yi Ku, Chien-Tsung Chen
  • Publication number: 20050257183
    Abstract: A method is capable of generating a command file of a group of design rule check (DRC) rules or layout versus schematic (LVS) rules and layout parasitic extraction (LPE) rules that can be used by a layout verification tool to verify the layout and the parasitic characteristics of an integrated circuit. The method comprises choosing whether to generate a command file of DRC rules or a command file of LVS/LPE rules, selecting a process from a group of processes, setting a set of parameters, and extracting program codes from a plurality of modules according to the selected process and the set of parameters so as to generate a command file of DRC rules or LVS/LPE rules.
    Type: Application
    Filed: May 11, 2004
    Publication date: November 17, 2005
    Inventors: Chun-Wei Lo, Szu-Sheng Kang, Chien-Yi Ku, Chien-Tsung Chen
  • Patent number: 6466049
    Abstract: A clock enable control circuit for controlling flip flops on a programmable logic device. The clock enable control circuit either passes an original data signal to the input terminal of a flip flop, or feeds back an output signal from the output terminal to the input terminal of the flip flop in response to a clock enable control signal. The clock enable control signal is selected from one of a set control signal and a reset control signal that are otherwise provided on the programmable logic device to selectively control set and reset functions of the flip flop. In one embodiment, the set and reset control signals are generated as product-term signals that are programmably routed by a product-term allocator circuit to a macrocell including the flip flop and the clock enable control circuit.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: October 15, 2002
    Assignee: Xilinx, Inc.
    Inventors: Sholeh Diba, Wei-Yi Ku, Jeffrey H. Seltzer
  • Patent number: 5991880
    Abstract: An overridable data protection mechanism for unlocking/locking a PLD includes a data protect override key register, an input key register, and a comparator. After the user inputs an access code to the input key register, the software program sends an enabling signal to the comparator which in turn compares the bits stored in the data protect override key register and the bits in the input key register. If the bits in the two registers are identical, then the comparator outputs a disable data protect signal, thereby allowing the user to modify the configuration data in that PLD. After an incremented version control number and the new configuration data are downloaded to the PLD, the program sends a disabling signal to the comparator, thereby preventing further modification to the configuration data on that PLD.
    Type: Grant
    Filed: November 10, 1998
    Date of Patent: November 23, 1999
    Assignee: Xilinx, Inc.
    Inventors: Derek R. Curd, Neil G. Jacobson, Sholeh Diba, Napoleon W. Lee, Wei-Yi Ku, Kameswara K. Rao