Abstract: A data read-write system includes a receiving terminal, a buffer, a memory and a writing module. The receiving terminal is used for receiving data, and the data includes a plurality of data blocks, and each data block is arranged into a two-dimensional matrix. The buffer includes a plurality of buffer blocks. The writing module includes a twisted block deinterleaving unit, a storage unit and an output unit. The twisted block deinterleaving unit reads each data block to obtain a plurality of first block strings. The storage unit distributes and stores the data blocks in each first block string in each buffer block. The output unit is used for outputting each data block in each buffer block to the memory for storage when the occupied capacity of each buffer block reaches an upper limit of a buffer capacity.

Abstract: A convolution time de-interleaver includes an input buffer, an output buffer, a memory, an input control circuit, an output control circuit, and a controller. The memory includes a plurality of memory blocks. The input control circuit sequentially outputs a plurality of entries of data to a plurality of input register unit groups of the input buffer respectively and correspondingly. After a predetermined amount of data have been written to the input buffer, the controller writes part of data stored in the input buffer to a corresponding memory block. After the plurality of memory blocks are written, the controller writes data stored in a corresponding memory block to the output buffer. The output control circuit sequentially outputs a plurality of pieces of data stored in a plurality of output register unit groups of the output buffer.

Abstract: A convolution time de-interleaver includes an input buffer, an output buffer, a memory, an input control circuit, an output control circuit, and a controller. The memory includes a plurality of memory blocks. The input control circuit sequentially outputs a plurality of entries of data to a plurality of input register unit groups of the input buffer respectively and correspondingly. After a predetermined amount of data have been written to the input buffer, the controller writes part of data stored in the input buffer to a corresponding memory block. After the plurality of memory blocks are written, the controller writes data stored in a corresponding memory block to the output buffer. The output control circuit sequentially outputs a plurality of pieces of data stored in a plurality of output register unit groups of the output buffer.