Patents by Inventor Yi-Lun Chou

Yi-Lun Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240133918
    Abstract: In a method for obtaining the equivalent oxide thickness of a dielectric layer, a first semiconductor capacitor including a first silicon dioxide layer and a second semiconductor capacitor including a second silicon dioxide layer are provided and a modulation voltage is applied to the semiconductor capacitors to measure a first scanning capacitance microscopic signal and a second scanning capacitance microscopic signal. According to the equivalent oxide thicknesses of the silicon dioxide layers and the scanning capacitance microscopic signals, an impedance ratio is calculated. The modulation voltage is applied to a third semiconductor capacitor including a dielectric layer to measure a third scanning capacitance microscopic signal. Finally, the equivalent oxide thickness of the dielectric layer is obtained according to the equivalent oxide thickness of the first silicon dioxide layer, the first scanning capacitance microscopic signal, third scanning capacitance microscopic signal, and the impedance ratio.
    Type: Application
    Filed: April 12, 2023
    Publication date: April 25, 2024
    Inventors: MAO-NAN CHANG, CHI-LUN LIU, HSUEH-LIANG CHOU, YI-SHAN WU, CHIAO-JUNG LIN, YU-HSUN HSUEH
  • Publication number: 20240105780
    Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer is disposed on and forms an interface with the nucleation layer. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. Spacings among adjacent peaks of the oscillating function change from wide to narrow with respect to a first reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
    Type: Application
    Filed: April 12, 2022
    Publication date: March 28, 2024
    Inventor: Yi-Lun CHOU
  • Publication number: 20240038885
    Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a single III-V group semiconductor layer, a third nitride-based semiconductor layer, a first source electrode and a second electrode, and a gate electrode. The second nitride-based semiconductor layer is disposed over the first nitride-based semiconductor layer. The single III-V group semiconductor layer is disposed between the first and second nitride-based semiconductor layers and doped to the first conductivity type. The single III-V group semiconductor layer has a high resistivity region and a current aperture enclosed by the high resistivity region, in which the high resistivity region comprises more metal oxides than the current aperture so as to achieve a resistivity higher than that of the current aperture. The third nitride-based semiconductor layer is disposed over the second nitride-based semiconductor layer.
    Type: Application
    Filed: November 9, 2021
    Publication date: February 1, 2024
    Inventors: Yi-Lun CHOU, Shuang GAO, Chuangang LI
  • Publication number: 20230261103
    Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a lattice layer, a third nitride-based semiconductor layer, a first source electrode and a second electrode, and a gate electrode. The second nitride-based semiconductor layer is disposed over the first nitride-based semiconductor layer. The lattice layer is disposed between the first and second nitride-based semiconductor layers and doped to the first conductivity type. The lattice layer comprises a plurality of first III-V layers and second III-V layers alternatively stacked. Each of the first III-V layers has a high resistivity region and a current aperture enclosed by the high resistivity region. The high resistivity region comprises more metal oxides than the current aperture so as to achieve a resistivity higher than that of the current aperture. At least two of the first III-V layers have the same group III element at different concentrations.
    Type: Application
    Filed: February 14, 2022
    Publication date: August 17, 2023
    Inventors: Yi-Lun CHOU, Shuang GAO, Chuangang LI
  • Publication number: 20230144369
    Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a lattice layer, a third nitride-based semiconductor layer, a first source electrode and a second electrode, and a gate electrode. The second nitride-based semiconductor layer is disposed over the first nitride-based semiconductor layer. The lattice layer is disposed between the first and second nitride-based semiconductor layers and doped to the first conductivity type. The lattice layer comprises a plurality of first III-V layers and a plurality of second III-V layers alternatively stacked. Each of the first III-V layers has a high resistivity region and a current aperture enclosed by the high resistivity region. The high resistivity region comprises more metal oxides than the current aperture. Interfaces formed between the high resistivity regions and the current apertures among the first III-V layers align with each other. The gate electrode aligns with the current aperture.
    Type: Application
    Filed: February 14, 2022
    Publication date: May 11, 2023
    Inventors: Yi-Lun CHOU, Shuang GAO, Chuangang LI
  • Publication number: 20230147426
    Abstract: A nitride-based semiconductor device includes a first nitride-based semiconductor layer, a lattice layer, a third nitride-based semiconductor layer, a first source electrode and a second electrode, and a gate electrode. The second nitride-based semiconductor layer is disposed over the first nitride-based semiconductor layer. The lattice layer is disposed between the first and second nitride-based semiconductor layers and doped to the first conductivity type. The lattice layer comprises a plurality of first III-V layers and second III-V layers alternatively stacked. Each of the first III-V layers has a high resistivity region and a current aperture enclosed by the high resistivity region. The high resistivity region comprises more metal oxides than the current aperture. At least two of the current apertures have different dimensions such that interfaces formed between the high resistivity regions and the current apertures misalign with each other. The gate electrode aligns with the current aperture.
    Type: Application
    Filed: February 14, 2022
    Publication date: May 11, 2023
    Inventors: Yi-Lun CHOU, Shuang GAO, Chuangang LI
  • Patent number: 11641005
    Abstract: A method of manufacturing a light-emitting element includes: providing a substrate, wherein the substrate includes a top surface with a first area and a second area; introducing a semiconductor material to form a first layer on the first area and a second layer on the second area, wherein the first layer includes a first crystal quality and the second layer includes a second crystal quality, the first crystal quality is different from the second crystal quality; and dicing the substrate along the second area.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: May 2, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Yi-Lun Chou, Chih-Hao Chen
  • Publication number: 20230072850
    Abstract: A semiconductor device includes a substrate, a nucleation layer, a buffer layer, first and second nitride-based semiconductor layers, a pair of S/D electrodes, and a gate electrode. The nucleation layer is disposed on the substrate. The buffer layer includes a III-V compound which includes a first element. The buffer layer is disposed on the nucleation layer. The buffer layer has a variable concentration of the first element that incrementally increases and then decrementally decreases as a function of a distance within a thickness of the buffer layer. The first nitride-based semiconductor layer is disposed on the buffer layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer and has a bandgap greater than a bandgap of the first nitride-based semiconductor layer. The S/D electrodes and a gate electrode are disposed over the second nitride-based semiconductor layer.
    Type: Application
    Filed: April 12, 2021
    Publication date: March 9, 2023
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220384583
    Abstract: The present disclosure provides a semiconductor device and a fabrication method thereof. The semiconductor device includes a substrate, a first nitride semiconductor layer, a second nitride semiconductor layer, and a carbonitride semiconductor layer. The first nitride semiconductor layer is over the substrate. The second nitride semiconductor layer is formed on the first nitride semiconductor layer and has a greater bandgap than that of the first nitride semiconductor layer. The carbonitride semiconductor layer is between the substrate and the first nitride semiconductor layer.
    Type: Application
    Filed: January 26, 2021
    Publication date: December 1, 2022
    Inventors: Yi-Lun CHOU, Peng-Yi WU
  • Publication number: 20220375876
    Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer is disposed on and forms an interface with the nucleation layer. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. Spacings among adjacent peaks of the oscillating function change from wide to narrow with respect to a first reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
    Type: Application
    Filed: April 12, 2021
    Publication date: November 24, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328680
    Abstract: A semiconductor device includes a substrate, a nucleation layer, a buffer layer, first and second nitride-based semiconductor layers, a pair of S/D electrodes, and a gate electrode. The nucleation layer includes a compound which includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer is disposed on and forms an interface with the nucleation layer. The buffer layer has a concentration of the first element cyclically oscillating with respect to first and second reference points within a buffer layer. The first and second reference points are respectively positioned at first and second distances from a top surface of the nucleation layer. The first nitride-based semiconductor layer is disposed on the buffer layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The S/D electrodes and a gate electrode are disposed over the second nitride-based semiconductor layer.
    Type: Application
    Filed: July 26, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328424
    Abstract: A semiconductor device includes a substrate, a nucleation layer, a buffer layer, first and second nitride-based semiconductor layers, a pair of S/D electrodes, and a gate electrode. The nucleation layer includes a compound which includes a first group III element and is devoid of a second group III element. The buffer layer includes a III-V compound which includes the first and second group III elements. The buffer layer has an element ratio of the first group III element to the second group III element that incrementally increases and then decrementally decreases as a function of a distance within a thickness of the buffer layer. The first nitride-based semiconductor layer is disposed on the buffer layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The S/D electrodes and a gate electrode are disposed over the second nitride-based semiconductor layer.
    Type: Application
    Filed: July 26, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328676
    Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. A first oscillation rate between a first reference point and a second reference point within the buffer layer is less than a second oscillation rate between the second reference point and a third reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
    Type: Application
    Filed: July 20, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328672
    Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer is disposed on and forms an interface with the nucleation layer. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. Spacings among adjacent peaks of the oscillating function change from narrow to wide with respect to a first reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
    Type: Application
    Filed: July 20, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328673
    Abstract: A semiconductor device includes a substrate, a nucleation layer, a buffer layer, first and second nitride-based semiconductor layers, a pair of S/D electrodes, and a gate electrode. The nucleation layer includes a compound which includes a first group III element and is devoid of a second group III element. The buffer layer includes a III-V compound which includes the first and second group III elements. The buffer layer has a variable concentration of the second group III element that incrementally increases and then decrementally decreases as a function of a distance within a thickness of the buffer layer. The first nitride-based semiconductor layer is disposed on the buffer layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The S/D electrodes and a gate electrode are disposed over the second nitride-based semiconductor layer.
    Type: Application
    Filed: July 26, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328675
    Abstract: A semiconductor device includes a nucleation layer, a buffer layer, a first nitride-based semiconductor layer, a second nitride-based semiconductor layer, S/D electrodes, and a gate electrode. The nucleation layer includes a composition that includes a first element. The buffer layer includes a III-V compound which includes the first element. The buffer layer has a concentration of the first element oscillating within the buffer layer, such that the concentration of the first element varies as an oscillating function of a distance within a thickness of the buffer layer. A first oscillation rate between a first reference point and a second reference point within the buffer layer is greater than a second oscillation rate between the second reference point and a third reference point within the buffer layer. The first and second nitride-based semiconductor layer, S/D electrodes, and a gate electrode are disposed on the buffer layer.
    Type: Application
    Filed: July 20, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328678
    Abstract: A semiconductor device includes a substrate, a nucleation layer, a buffer layer, first and second nitride-based semiconductor layers, a pair of S/D electrodes, and a gate electrode. The nucleation layer is disposed on the substrate. The buffer layer includes a III-V compound which includes a first element. The buffer layer is disposed on the nucleation layer. The buffer layer has a variable concentration of the first element that decrementally decreases and then incrementally increases as a function of a distance within a thickness of the buffer layer. The first nitride-based semiconductor layer is disposed on the buffer layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer and has a bandgap greater than a bandgap of the first nitride-based semiconductor layer. The S/D electrodes and a gate electrode are disposed over the second nitride-based semiconductor layer.
    Type: Application
    Filed: July 26, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328425
    Abstract: A semiconductor device includes a nucleation layer, a first buffer layer, a first nitride-based semiconductor layer, and a second buffer layer. The nucleation layer includes a compound which includes a first element. The first buffer layer includes a III-V compound which includes the first element. A concentration of the first element varies with respect to a first reference point within the first buffer layer. The first nitride-based semiconductor layer is disposed on the first buffer layer. The second buffer layer includes a III-V compound which includes a second element different than the first element. The second buffer layer is disposed on and forms an interface with the first nitride-based semiconductor layer. A concentration of the second element varies to cyclically oscillate as a function of a distance within a thickness of the second buffer layer, which occurs with respect to a second reference point within the second buffer layer.
    Type: Application
    Filed: July 26, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328674
    Abstract: A semiconductor device includes a substrate, a nucleation layer, a buffer layer, first and second nitride-based semiconductor layers, a pair of S/D electrodes, and a gate electrode. The nucleation layer includes a compound which includes a first group III element and is devoid of a second group III element. The buffer layer includes a III-V compound which includes the first and second group III elements. The buffer layer has an element ratio of the first group III element to the second group III element that decrementally decreases and then incrementally increases as a function of a distance within a thickness of the buffer layer. The first nitride-based semiconductor layer is disposed on the buffer layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer. The S/D electrodes and a gate electrode are disposed over the second nitride-based semiconductor layer.
    Type: Application
    Filed: July 26, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN
  • Publication number: 20220328679
    Abstract: A semiconductor device includes a substrate, a nucleation layer, a buffer layer, first and second nitride-based semiconductor layers, a pair of S/D electrodes, and a gate electrode. The nucleation layer is disposed on the substrate. The buffer layer includes a III-V compound which includes a first element. The buffer layer is disposed on the nucleation layer. The buffer layer has a variable concentration of the first element that decrementally decreases and then incrementally increases as a function of a distance within a thickness of the buffer layer. The first nitride-based semiconductor layer is disposed on the buffer layer. The second nitride-based semiconductor layer is disposed on the first nitride-based semiconductor layer and has a bandgap greater than a bandgap of the first nitride-based semiconductor layer. The S/D electrodes and a gate electrode are disposed over the second nitride-based semiconductor layer.
    Type: Application
    Filed: July 26, 2021
    Publication date: October 13, 2022
    Inventors: Yi-Lun CHOU, Kye Jin LEE, Han-Chin CHIU, Xiuhua PAN